;
; setup ADC module for RA0 as an analog input, Fosc/32 conversion
; clock (20-Mhz), and internal Vdd/Vss Voltage Reference.
;
bsf STATUS,RP0 ; select Bank 1 |B1
movlw b'00000001' ; |B1
movwf TRISA ; set RA0 pin as input |B1
movlw b'00000001' ; set RA0/AN0 pin as analog and |B1
movwf ANSEL ; other 6 ANx pins as digital |B1
movlw b'01000000' ; ADSC2 clock source/2 |B1
movwf ADCON1 ; left justified, internal Vref |B1
bcf STATUS,RP0 ; select Bank 0 |B0
; movlw b'01000000' ; Fosc/08, ch 0, ADC off ( 8-mhz) |B0
movlw b'10000000' ; Fosc/32, ch 0, ADC off (20-mhz) |B0
movwf ADCON0 ; |B0
;
; turn on the ADC module, take a reading, return with 8 most
; signigicant bits of reading in W
;
ADC bsf ADCON0,ADON ; turn on AD module |B0
bcf PIR1,ADIF ; clear AD interrupt flag |B0
movlw d'33' ; use 33 (20 mhz) or 13 (8 mhz) |B0
movwf TEMP ; |B0
ACQ decfsz TEMP,F ; wait 20 usec to acquire |B0
goto ACQ ; |B0
bsf ADCON0,GO_DONE ; start conversion |B0
ADX btfsc ADCON0,GO_DONE ; conversion complete? |B0
goto ADX ; no, loop |B0
movf ADRESH,W ; get result high byte |B0
bcf ADCON0,ADON ; turn off AD module |B0
return ; |B0
The resistor is needed only when you use LVP - Low Voltage Programming. Because setting RB3 High will enter Programming mode (Regardless of MCLR). I highly recomend not use this mode, so in every program you write, simply disable LVP bit, so you can use RB3 as general purpose I/O. All new chips have LVP set on from the Factory, so that you can program them with LVP style programmer. :lol:williB said:i stumbled across a circuit earlier today which showed RB3 connected to ground through a resistor .. do i need to do this , on the F88 when programming??
MCLR is always possible, LVP can be disabled..williB said:SE the documentation says that you can use MCLR even when LVP is enabled..
i am almost there..with the reprogramming..
i can alter a single location at will..
one step forward two steps back *sigh*
; setup ADC module for RA0 as an analog input, Fosc/32 conversion
; clock (20-Mhz), and internal Vdd/Vss Voltage Reference.
;
bsf STATUS,RP0 ; select Bank 1 |B1
movlw b'00000001' ; |B1
movwf TRISA ; set RA0 pin as input |B1
movlw b'00000001' ; set RA0/AN0 pin as analog and |B1
movwf ANSEL ; other 6 ANx pins as digital |B1
movlw b'01000000' ; ADSC2 clock source/2 |B1
movwf ADCON1 ; left justified, internal Vref |B1
bcf STATUS,RP0 ; select Bank 0 |B0
; movlw b'01000000' ; Fosc/08, ch 0, ADC off ( 8-mhz) |B0
movlw b'10000000' ; Fosc/32, ch 0, ADC off (20-mhz) |B0
movwf ADCON0 ; |B0
; turn on the ADC module, take a reading, return with 8 most
; signigicant bits of reading in W
;
ADC bsf ADCON0,ADON ; turn on AD module |B0
bcf PIR1,ADIF ; clear AD interrupt flag |B0
movlw d'33' ; use 33 (20 mhz) or 13 (8 mhz) |B0
movwf TEMP ; |B0
ACQ decfsz TEMP,F ; wait 20 usec to acquire |B0
goto ACQ ; |B0
bsf ADCON0,GO_DONE ; start conversion |B0
ADX btfsc ADCON0,GO_DONE ; conversion complete? |B0
goto ADX ; no, loop |B0
movf ADRESH,W ; get result high byte |B0
bcf ADCON0,ADON ; turn off AD module |B0
return ; |B0
;******************************************************************
org 0x0000
RESET clrf STATUS ; |B0
clrf PORTA ; clear Port A data latches |B0
clrf PORTB ; clear Port B data latches |B0
movlw h'07' ; |B0
movwf CMCON ; turn comparator off |B0
bsf STATUS,RP0 ; select bank 1 |B1
clrf TRISA ; port A all outputs |B1
clrf TRISB ; port B all outputs |B1
bcf STATUS,RP0 ; select bank 0 |B0
;
; setup PWM (looks like CCPR1L uses Tosc while PR2 uses Tcyc)
;
clrf T2CON ; TMR2 prescale:1 |B0
movlw d'100' ; same as (100*4)>>2 |B0
movwf CCPR1L ; 100 usecs, 50% duty cycle? |B0
bsf STATUS,RP0 ; select bank 1 |B1
movlw d'200'-1 ; 200 1.0 usec 'ticks' |B1
movwf PR2 ; Period=200 usecs, Freq=5.0 KHz |B1
bcf STATUS,RP0 ; select bank 0 |B0
movlw b'00001100' ; |B0
movwf CCP1CON ; put CCP module in PWM mode |B0
bsf T2CON,TMR2ON ; turn on TMR2 |B0
;
; now test to see if the LED on RB3 is glowing at 50% brightness
;
LOOP goto LOOP ; loop indefinately |B0
;
;***************************************************************
org 0x0000
clrf STATUS ; |B0
clrf PORTA ; clear Port A data latches |B0
clrf PORTB ; clear Port B data latches |B0
movlw h'07' ; |B0
movwf CMCON ; turn comparator off |B0
bsf STATUS,RP0 ; select bank 1 |B1
clrf TRISA ; port A all outputs |B1
clrf TRISB ; port B all outputs |B1
movlw b'00000001' ; |B1
movwf TRISA ; set RA0 pin as input |B1
movlw b'00000001' ; set RA0/AN0 pin as analog and |B1
movwf ANSEL ; other 6 ANx pins as digital |B1
movlw b'01000000' ; ADSC2 clock source/2 |B1
movwf ADCON1 ; left justified, internal Vref |B1
bcf STATUS,RP0 ; select Bank 0 |B0
movlw b'01000000' ; Fosc/08, ch 0, ADC off ( 8-mhz) |B0
movwf ADCON0 ; |B0
ADC bsf ADCON0,ADON ; turn on AD module |B0
bcf PIR1,ADIF ; clear AD interrupt flag |B0
clrf T2CON ; TMR2 prescale:1 |B0
movf RESULT,W ; B0
movwf CCPR1L ; 100 usecs, 50% duty cycle? |B0
bsf STATUS,RP0 ; select bank 1 |B1
movlw d'200'-1 ; 200 1.0 usec 'ticks' |B1
movwf PR2 ; Period=200 usecs, Freq=5.0 KHz |B1
bcf STATUS,RP0 ; select bank 0 |B0
movlw b'00001100' ; |B0
movwf CCP1CON ; put CCP module in PWM mode |B0
bsf T2CON,TMR2ON ; turn on TMR2 |B0
bsf ADCON0,GO_DONE ; start conversion |B0
ADX btfsc ADCON0,GO_DONE ; conversion complete? |B0
goto ADX ; no, loop |B0
movf ADRESH,W ; get result high byte |B0
movwf RESULT ; store in temp register B0
bcf ADCON0,ADON ; turn off AD module |B0
org 0x0000
RESET clrf STATUS ; |B0
clrf PORTA ; clear Port A data latches |B0
clrf PORTB ; clear Port B data latches |B0
movlw h'07' ; |B0
movwf CMCON ; turn comparator off |B0
bsf STATUS,RP0 ; select bank 1 |B1
clrf TRISA ; port A all outputs |B1
clrf TRISB ; port B all outputs |B1
bcf STATUS,RP0 ; select bank 0 |B0
;
; setup PWM (looks like CCPR1L uses Tosc while PR2 uses Tcyc)
;
clrf T2CON ; TMR2 prescale:1 |B0
movlw d'000' ; |B0
movwf CCPR1L ; 00% duty cycle initially |B0
bsf STATUS,RP0 ; select bank 1 |B1
movlw d'255'-1 ; 255 200-nsec 'ticks' |B1
movwf PR2 ; Period=255 (*200-nsecs) |B1
bcf STATUS,RP0 ; select bank 0 |B0
movlw b'00001100' ; |B0
movwf CCP1CON ; put CCP module in PWM mode |B0
bsf T2CON,TMR2ON ; turn on TMR2 |B0
;
; setup ADC module for RA0 as an analog input, Fosc/32 conversion
; clock (20-Mhz), and internal Vdd/Vss Voltage Reference.
;
bsf STATUS,RP0 ; select Bank 1 |B1
movlw b'00000001' ; |B1
movwf TRISA ; set RA0 pin as input |B1
movlw b'00000001' ; set RA0/AN0 pin as analog and |B1
movwf ANSEL ; other 6 ANx pins as digital |B1
movlw b'01000000' ; ADSC2 clock source/2 |B1
movwf ADCON1 ; left justified, internal Vref |B1
bcf STATUS,RP0 ; select Bank 0 |B0
; movlw b'01000000' ; Fosc/08, ch 0, ADC off ( 8-mhz) |B0
movlw b'10000000' ; Fosc/32, ch 0, ADC off (20-mhz) |B0
movwf ADCON0 ; |B0
;
LOOP call ADC ; read potentiometer (000..255) |B0
movwf CCPR1L ; update duty cycle |B0
goto LOOP ; loop forever |B0
;
; turn on the ADC module, take a reading, return with 8 most
; signigicant bits of reading in W
;
ADC bsf ADCON0,ADON ; turn on AD module |B0
bcf PIR1,ADIF ; clear AD interrupt flag |B0
movlw d'33' ; use 33 (20 mhz) or 13 (8 mhz) |B0
movwf TEMP ; |B0
ACQ decfsz TEMP,F ; wait 20 usec to acquire |B0
goto ACQ ; |B0
bsf ADCON0,GO_DONE ; start conversion |B0
ADX btfsc ADCON0,GO_DONE ; conversion complete? |B0
goto ADX ; no, loop |B0
movf ADRESH,W ; get result high byte |B0
bcf ADCON0,ADON ; turn off AD module |B0
return ; |B0
;******************************************************************
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