Hello, I need some help here. Can someone please give me some hint on how to build a 22Mhz sample and hold circuit? Haunted me for these few days because the frequency are just too high. Thanks. Please help me to solve this problem.
Hello, I need some help here. Can someone please give me some hint on how to build a 22Mhz sample and hold circuit? Haunted me for these few days because the frequency are just too high. Thanks. Please help me to solve this problem.
How wide (in nanoseconds) do you want the sample pulse to be?
What sort of waveform are you sampling?
What is the range of the input voltage?
What is the source impedance?
Actually the sample and hold is use at the front end of ADC. A 22MHz with 4-6V(peak to peak) sine wave as the input, will be sampled at 44MHz. So the output waveform should be in some sort like a square wave due to sampled twice based on the Nyquist Theorem.
Can you please give me some direct hint on it? thanks..
So you need a 44 Mhz sample and hold circuit?
Are you building the ADC yourself?
Usually integrated ADC circuits have the sample and hold circuit already build in.
A 22 Mhz signal can still be aliased to 0 hz (or 0 amplitude) debending on the phase difference of the signal and sampling. According to Nyquist Theorem 44 Mhz is the minimum sampling frequency for 22 Mhz signal. In practical applications it is better to use higher sampling frequency than the theoretical minimum. Your low pass filter plays an important role when choosing the sampling frequency. If you decide to sample with the minimum frequency, you need a very good low-pass filter. If you decide to sample with higher frequency (over-sampling) you can use much simpler low-pass filter.
MisterT, thanks for your suggestion. But my part is just on doing the sample and hold circuit, so ADC is none of my concern. Thanks again though. Attached below here is the circuit that I'm working on for the past few days. The problem is,I can only reach around 1Mhz with this circuit. Also, I'm using high speed FET and Op-Amp. The capacitor is polypropylene type and the clock acts as the sampling frequency.Theoretically, 22Mhz is not a problem. Help me please.
It is actually my college assignment. My task is simply just to construct a sample and hold circuit practically, but I was told by my lecturer that the best if able to reach 22MHz.
Of course with higher sampling frequency the more accurate output I can get. However, I afraid the capacitor is not fast enough to response and cause some errors. What is the problem with this circuit?
There are op-amps that have shutdown function. When the op-amp is in shutdown mode its output is in high-impedance mode. I don't know how fast they can be switched, but with that kind of op-amp you might be able to eliminate the mos transistor switch in your design.
It is actually my college assignment. My task is simply just to construct a sample and hold circuit practically, but I was told by my lecturer that the best if able to reach 22MHz.
Your instructor seems to have little appreciation for the difficulty of doing a 22MHz sample and hold. It's not the type of project that should be assigned for classwork. It requires switches with very low gate capacitance, a low value sampling capacitor, and careful layout. Your best bet would be to find an IC S&H that can do the job.
hey guys, thanks alot for your suggestions. I've been searching through the web actually and it turns out to be nothing. Just for your information, as long as I can reach more than 5Mhz it should be fine. Any suggestions on how to do it?
Roff, do you mind if you share some information with me? I desperately need some help here.
hey guys, thanks alot for your suggestions. I've been searching through the web actually and it turns out to be nothing. Just for your information, as long as I can reach more than 5Mhz it should be fine. Any suggestions on how to do it?
Roff, do you mind if you share some information with me? I desperately need some help here.
I'm not sure I can help without spending hours designing, and even then you would learn very little. I also doubt your instructor would believe that you did the design work.
OK, I whipped up a preliminary design that will handle an input signal of ±0.5V max. I simulated it, and it looks pretty good.
What would you do with it if I posted it? Do you actually have to build it? Simulate it? Just turn in a schematic?
Ya, I need to simulate it to make sure it can function well, then I have to construct the circuit and test it. Can you please tell me what is the maximum frequency of your sample and hold circuit?
Ya, I need to simulate it to make sure it can function well, then I have to construct the circuit and test it. Can you please tell me what is the maximum frequency of your sample and hold circuit?
I have it sampling at 5MHz. It will run faster - not sure how much.
I think you might have a problem getting some of the parts to actually build it. For example, I used eight 1ps70sb10 Schottky diodes, made by NXP.
Do you have LTspice, and do you know how to use it?
Are you supposed to design this yourself? If so, how are you going to explain how you designed this? I'll guarantee you there are very few college students who would design a sample and hold using the approach I used.
Perhaps you should consider using an analog switch like 74HC4066. I'm not sure if they would work well at 5MHz, but if so, it would be a heck of a lot simpler than the approach I took.
I'm using multisim to simulate my circuit, but the 1ps70sb10 diode is not found in multisim library. However, getting the diode is not a problem for me. Also, Im not going to design the circuit by myself because my instructor allow me to search through or refer to the web. Roff, perhaps I give you my email address wyiancwc88@hotmail.com and then you send it to me? Thanks a lot Roff. I really appreciate it.
Roff, I've tried to replace the FET using 4066 quad analog switch. It can reach 5MHz but the input output voltage range is only +-0.5V due to the IC characteristic. However what I want is in the voltage range of +-2V, is there any solution?