6 member voting projects

[mee95]

Hi everyone!

Im wondering if someone can help me with something. Namely, i should make a project depicting a simulation of 6 members voting for a choice (one of them is the president and his vote counts as two if voting turns out even). Im going to upload a pdf file of what i did already so i think theres not much left to do (which im not sure if its correct, im not really good at this and im a begginer) and im not sure what should i put in SUB01 etc. to make this work...Ive tried several things and none of them work.
Im supposed to make this with exclusively NAND gates, i know that there is probably an easier way but this is the condition. If it means something, i need to do the project in Proteus 8, heres the link for their webpage https://www.labcenter.com/index.cfm.

Anyway if anyone can help me at all i would really appreciate it! Thanks in advance

 

[Tony Stewart]

• Essentially a 7x1 adder with one user having 2 inputs, would be easier with resistors and a comparator. with octal level logic
• But in your case needs to be a binary logic with NANDs only.
• So you need cascaded full adders and comparator >=0100 or =x1xx , as 4 votes is the minimum positive vote.
• The inputs have not been defined.
  • ( tertiary logic inputs? 1,0,x ? or binary)
  • OUTPUT IS ASSUMED TO BE BINARY (YEA OR NAY)

 

[mee95]

Thank you for your answer!
But, im sorry if i sound really stupid i really dont know how to do this well, should i place the full adders in in the SUB01 SUB02 etc. ? or is that part not done well?
And yeah i should have binary outputs