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74160 Function

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Hoo-U-Wit

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I need to build a digital clock using Multisim, then transfer this schematic to an actual circuit in the lab. Seems easy enough, but there seems to be a problem with the 74160 counter I'm using. I don't know if I have this thing configured correctly, but the normal counting procedure works fine it I let it cycle through 9. When I force the chip to reset at 6, I don't get a "High" at "RCO" output. I thought anytime the chip is reset, a "High" is automatic. I'm attaching an image of the circuit. Any help is greatly appreciated!
 

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You cannot.

This is how the 74160 has worked for more than 30 years. It won't change just for you.
 
Cool! Can you advise me how to set this circuit up so that when "59" seconds is reached, it resets to "1 min 00 sec"? Thanks!
 
Usee an AND gate (7430?) at xx:59 to do a synchronous reset on U1 and U3 (need different chip, maybe 74161?). Use that same signal as clock enable for U5.

oops, I just noticed that you're cascading the 74160's as a ripple counter. Before making serious changes, study synchronous counters.

If you're staying with asynchronous counters, reset U1 and U3 with xx:60.
 
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Hi Hoo-U-Wit,

Normally when a counter jumps from 9 to 0 the carry output will
advance the next counter but there seems to be a bit of a problem
with this configuration because the next counter will advance when
the units counter reaches 9. I think you should insert an inverter
between the carry output of the previous counter and the clock input
of the next counter. Only then will the tens counter advance if the
units counter jumps to 0. Look at the timing diagram at page 10 of
the datasheet. By doing so the tens counter will jump to 6 and reset
to zero at the moment the units counter jumps to 0.
The reason for this strange behaviour is that you are using
synchronous counters and cascade them as asynchronous counters.
The next step is to clock the minutes units counter with the output
of the nand gates of the tens second counter. You could also add an
inverter here but it isn't really necessary because the falling edge
of the nand gate is immediately followed by a rising edge and you
won't notice the difference anyway.

Second possibility is Mneary's advice to use a two input NAND gate
to generate a reset pulse when the counter jumps to 9 and a 74162
counter will reset at the next rising edge of the clock pulse.
But . . . dont forget that if you also change the tens counters to
74162 you will have to generate the reset pulse when the counter jumps
to 5 and not to 6.
Have much fun ! :D


https://www.alldatasheet.com/datasheet-pdf/pdf/27443/TI/74160.html


on1aag.
 
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