ACF2101 switched integrator problem

[dgnr]

Hi there,

I am having some problems getting the ACF2101 switched integrator to integrate. I've tried my best to troubleshoot for a few weeks but couldn't figure it out and am hoping that someone here can point out my mistake or give me some advice.

I have it connected basically as in Figure 12 (Using the ACF2101 with a Voltage Source) in the datasheet (Precision Amplifier - Low Input Bias Current/FET Input - ACF2101 - TI.com), except that R1 is connected to 1V out from a potentiometer which is connected to +5V supply. Also, I have do not have capacitor C1, but I have a Schottky diode for D1 (1N5819, tested forward voltage drop of 0.02V)

I have the select, hold and reset pins controlled by a PIC microcontroller (outputs 3.3V), and the IC is powered by +-5V supply. It is a SOIC chip soldered onto a SOIC to DIL adaptor and connected on a breadboard for testing.

When I put it in Integrate mode, I would expect that the voltage should integrate until it reaches the negative limit of -5V. However, on the oscilloscope I only get milivolts and this voltage does not seem to change regardless of the mode.

In Integrate mode, a HI is sent to the reset switch and a LO is sent to the Reset switch but when I measure the voltage at the pins, both voltages are at 0.29V. However, when in HOLD mode, both switches are sent HI signals and the voltages at those pins are also at 3.3V ?

Hopefully someone here has experience with this chip. Any ideas would be greatly appreciated. Thanks.

 

[ericgibbs]

hi,
I have not used this particular device, but I have been looking over the datasheets etc.

Found this app pdf which may help, I read that the HOLD/RESET switch polarity is negative going.??

 

[dgnr]

hi,
I have not used this particular device, but I have been looking over the datasheets etc.

Found this app pdf which may help, I read that the HOLD/RESET switch polarity is negative going.??

Thanks for the reply. Yes, I have read that app note before. When you say switch polarity do you mean the withstand voltage ? How would that affect the connections in my circuit ?

 

[ericgibbs]

Thanks for the reply. Yes, I have read that app note before. When you say switch polarity do you mean the withstand voltage ? How would that affect the connections in my circuit ?

hi,
Looking at fig #11 in the datasheet shows a 555/6 timers powered by +15V.???
So the HOLD would +15V/0V
The RESET and SELECT are from the 556 thru inverters.?

I have been searching the web for more info on these levels with little success.

EDIT:
A little more info.

 

[crutschow]

If you look at FIGURE 2 in the App Note, it says that the switches are closed for a logic "0" and the switches are open for a logic "1". Thus you want the Hold signal and Select signal low, and the Reset signal high for the circuit to integrate. Is that what you are doing?

Post a schematic.

 

[dgnr]

hi,
Looking at fig #11 in the datasheet shows a 555/6 timers powered by +15V.???
So the HOLD would +15V/0V
The RESET and SELECT are from the 556 thru inverters.?

I have been searching the web for more info on these levels with little success.

EDIT:
A little more info.

I'm not really familiar with the 555/6 timers, but in the datasheet it says digital input Logic 1 of 2 to 5.5V and Logic 0 of -0.5 to 0.8V ?
That is the problem I have as well; there is not a lot of documentation on this particular chip.

If you look at FIGURE 2 in the App Note, it says that the switches are closed for a logic "0" and the switches are open for a logic "1". Thus you want the Hold signal and Select signal low, and the Reset signal high for the circuit to integrate. Is that what you are doing?

Post a schematic.

Yup, that is what I am doing. I will try to draw and post a schematic.



At the moment, I suspect it might be due to using the wrong supply voltages. I will do some testing and post back here when I'm done.
edit : I've changed the -V supply to -13V but it is still not integrating.

 

[ericgibbs]

hi dgnr,
Please post a sketch showing ALL your circuit.

 

[dgnr]

Here you go,

 

[ericgibbs]

Here you go,

hi,
hi,
Studying the d/s for the IC.
The normal supply for the device must be +5, -15V and
the voltage output range is typically -13.5v thru +0.5v

Its states that the digital inputs are TTL compatible

Integrate Mode, the output voltage integrates negatively towards -10V

Hold Mode, the output voltage remains at its present value.

Reset Mode, the integration cap is discharged to analog common.

What is connected to the 'osc' pin on your sketch.?

Is D1 0.4Vfwd drop and where is C1.?

The documentation on this device is limited.

All the parameters are quoted for +5V/-15V operation.??

 

[dgnr]

hi,
hi,
Studying the d/s for the IC.
The normal supply for the device must be +5, -15V and
the voltage output range is typically -13.5v thru +0.5v

Its states that the digital inputs are TTL compatible

Integrate Mode, the output voltage integrates negatively towards -10V

Hold Mode, the output voltage remains at its present value.

Reset Mode, the integration cap is discharged to analog common.

What is connected to the 'osc' pin on your sketch.?

Is D1 0.4Vfwd drop and where is C1.?

The documentation on this device is limited.

All the parameters are quoted for +5V/-15V operation.??

Yup, that is the operation of the chip. I have tried using a -15V supply as well. The 'osc' is supposed to mean that it is connected to an oscilloscope.

D1 forward voltage drop is <0.4V, which is whats required. I did not have C1 as the datasheet states that "addition of either C1 or D1 in the circuit is critical for proper Hold mode operation", so I thought that having D1 was enough ?

 

[ericgibbs]

hi,
I would try the following test.
With RESET & HOLD sw's open, disconnect the PIC.
HOLD high to +5V via a 1k resistor and RESET tie low to 0V [integrate mode]

Use the current source as you have drawn, [set for about 50uA, the output should integrate to -10V.

You say in your 1st post that the clamp diode is 0.02Vfwd.???, perhaps you are sinking the charge current thru the diode rather than to the internal cap.?

 

[dgnr]

Hi Eric,

You are right, now with the correct supply voltage (-12V), turns out the charge current is going through the diode to ground. When the diode is removed, the chip manages to integrate, although in the Hold mode (which is what is expected as in the datasheet pg. 13). The addition of D1 and/or C1 is supposed to prevent this and ensure that the chip integrates only in 'Integrate' mode.

However, I do not really understand how the addition of D1 and C1 (to ensure that 'Sw In' voltage does not exceed +0.5V) will still let the internal cap charge ? Doesn't the charge go through D1 straight to ground ? Also, if C1 is charged, wouldn't C1 charge up to the near voltage source's voltage ?

 

[ericgibbs]

Hi Eric,

You are right, now with the correct supply voltage (-12V), turns out the charge current is going through the diode to ground. When the diode is removed, the chip manages to integrate, although in the Hold mode (which is what is expected as in the datasheet pg. 13). The addition of D1 and/or C1 is supposed to prevent this and ensure that the chip integrates only in 'Integrate' mode.

However, I do not really understand how the addition of D1 and C1 (to ensure that 'Sw In' voltage does not exceed +0.5V) will still let the internal cap charge ? Doesn't the charge go through D1 straight to ground ? Also, if C1 is charged, wouldn't C1 charge up to the near voltage source's voltage ?

hi,
The only info I can see is this extract from the datasheet, the way it describes the function is ambiguous in my opinion.
Its suggests that the timing of the HOLD/RESET functions has be such that the C1 transfer charge is held below 0.4V.???
I'll keep looking for more info.


EDIT:
Use a standard silicon signal diode in place of the Schottky diode, ideally you want 0.4Vfwd at about 100uA.
The integration period is in the microseconds region, you need to correctly cycle the HOLD and RESET pins to get a meaningful negative voltage from the output.
You require an inverting buffer from the output of ACF2101 before its input to the PIC, also scale the output down from -10V to +3.3V

 

[ericgibbs]

hi dgnr,
I have made a rough simulation in LTspice. The timing circuit and components as the datasheet, I have inverted the HOLD/RESET & SELECT for the sim only.

 

[dgnr]

hi,
The only info I can see is this extract from the datasheet, the way it describes the function is ambiguous in my opinion.
Its suggests that the timing of the HOLD/RESET functions has be such that the C1 transfer charge is held below 0.4V.???
I'll keep looking for more info.


EDIT:
Use a standard silicon signal diode in place of the Schottky diode, ideally you want 0.4Vfwd at about 100uA.
The integration period is in the microseconds region, you need to correctly cycle the HOLD and RESET pins to get a meaningful negative voltage from the output.
You require an inverting buffer from the output of ACF2101 before its input to the PIC, also scale the output down from -10V to +3.3V

Hmm, seems like that would be the only explanation, although it seems like way too much trouble just to make it work in voltage input mode.

Perhaps I can use it in current source input mode instead (datasheet Figure 10) ? Do you have any idea how I can make the chip see my voltage source and resistance as a current source ? Maybe some kind of buffer in between them ?

I have also done a quick simulation as well (PSPICE), and the concept seems to work fine.

Thanks.

 

[ericgibbs]

Hmm, seems like that would be the only explanation, although it seems like way too much trouble just to make it work in voltage input mode.

Perhaps I can use it in current source input mode instead (datasheet Figure 10) ? Do you have any idea how I can make the chip see my voltage source and resistance as a current source ? Maybe some kind of buffer in between them ?

I have also done a quick simulation as well (PSPICE), and the concept seems to work fine.

Thanks.

hi,
I would use a jFET , say a 2N3820 as constant current source.
This type of CC is very stable and easily controlled.

Look at this pdf for applications.
I'll look at Fig #10 in the d/s/

Can you say what exactly you are using this ACF device for in your project.??

 

[dgnr]

hi,
I would use a jFET , say a 2N3820 as constant current source.
This type of CC is very stable and easily controlled.

Look at this pdf for applications.
I'll look at Fig #10 in the d/s/

Can you say what exactly you are using this ACF device for in your project.??

Yes, of course. I'm using the integrator to try to measure resistances connected to the input, based on the fact that when the resistance changes, the charging current and hence integration time changes.

So would this JFET be between my voltage source+resistance and the chip ?

As above, I need the current out of the JFET to be able to change as R changes and current Vs/R changes, and also the current out of the JFET should be equal to Vs/R without any changes/amplification ?

 

[ericgibbs]

Yes, of course. I'm using the integrator to try to measure resistances connected to the input, based on the fact that when the resistance changes, the charging current and hence integration time changes.

So would this JFET be between my voltage source+resistance and the chip ?

As above, I need the current out of the JFET to be able to change as R changes and current Vs/R changes, and also the current out of the JFET should be equal to Vs/R without any changes/amplification ?

hi,
Its common practice to measure resistance values by passing a known constant current thru them and measuring the voltage across the unknown resistor.

I would have chosen to make my own adjustable CC source rather than the ACF, it looks a little over the top for measuring resistors.

If you decide to go the DYI route, let me know the resistance ranges you want to measure over and I will suggest CC sources.

 

[dgnr]

Hi Eric,
I've 'kind of' solved my problem; I'll be using the chip in voltage input mode but ignoring the hold switch limitation, as I figured I do not need the Hold function anyway.
Anyway, thanks for all the help and information, I really appreciate it !

 

[ericgibbs]

Hi Eric,
I've 'kind of' solved my problem; I'll be using the chip in voltage input mode but ignoring the hold switch limitation, as I figured I do not need the Hold function anyway.
Anyway, thanks for all the help and information, I really appreciate it !

hi dgnr,
Pleased to hear its working, thanks for letting me know.