I have already build the frequency counter using pic16f628a. i intended to build it for my diy fm radio. but the problem is fm frequency range is 88-108 mhz ,but my counter only able to handle up to 50 mhz. so i use 74F74 d flip flop, as frequency devider devide by 4. i tested it with 16 mhz crystal oscillator, and my counter showing me 16/4 value ie = 4 mhz(3.988 in the pic). I WAS HAPPY until i found that it is use less for fm radio, i tried several way but no luck. what could be the wrong? may be because 74F74 could handle only upto 100 mhz?....i dont know...although i have already order some faster chip like 74ac74 (it says max frequency up to 150mhz.).
i need some help for the better circutery....like
1) how to connect the counter with the radio?( if i connect the counter to the osc pin of the radio, oscillation stops.)
2)best possible circuit of 74ac74 as frequency devider for my purpose.
,but my counter only able to handle up to 50 mhz. so i use 74F74 d flip flop, as frequency devider devide by 4. i tested it with 16 mhz crystal oscillator, and my counter showing me 16/4 value ie = 4 mhz(3.988 in the pic
OK that is a reasonable technique, to use a /4 prescaler.
But, if you are injecting a true 16/4MHz signal to test, and the counter is displaying 3.988, something is very wrong.
You should se 4.000 +/-1
You need some kind of a buffer amplifier, the local oscillator in the radio will not have enough output voltage to drive a TTL type divider.
I once made a simple counter using a PIC 16F628, I just pulled it out of my box of PICbits, and it looks as though I used a BFY90 as a buffer amplifier, probably because I had one.
yes, you need to have a counter circuit that preloads the offset into the counter (that's the method used on TTL or CMOS counter add-ons available many years ago), the counters would be preloaded with the offset (plus or minus 455 khz for AM/SW radios, plus or minus 10.7Mhz for FM), and then the counter gate would open for 1 second and the counters would start counting from the preloaded value, and the result would be correct. you might try starting with a divide by 10 or divide by 100 (again a unity gain buffer or some amplification is required between the oscillator and the first divider) to get the signal you are counting down to a frequency within the operating range of the counter ICs (this means you would get 1Mhz for a 100Mhz input, but you can place the decimal point anywhere you choose, so it would still read 100.0Mhz). powers of 10 simplify the counter circuits, rather than dividing by 16 or 4 and trying to figure out what you should be reading. again, using presettable counters will fix the offset problem. using a loosely coupled frequency counter, or a SDR radio as a spectrum analyzer, can tell you whether your offset is positive or negative.
yes, you need to have a counter circuit that preloads the offset into the counter (that's the method used on TTL or CMOS counter add-ons available many years ago), the counters would be preloaded with the offset (plus or minus 455 khz for AM/SW radios, plus or minus 10.7Mhz for FM), and then the counter gate would open for 1 second and the counters would start counting from the preloaded value, and the result would be correct.
I suggest using a prescaler IC such as an MC1280. (This one divides by 10, 20, 40 or 80) You will probably need to use a buffer amplifier to reduce the load on the oscillator. I agree with Nigel that modifying the code in the PIC is the best way to deal with the 10.7 Mhz offset.