Baffled by MCLR

[jpanhalt]

Can someone help clarify the following (Device=12F509) :

It seems that in the “unprogrammed” state of MCLR, the MCLR bit is set to 1 . That enables external control. When programmed (bit=0), the MCLR pin is said to be configured as MCLR:

When programmed, the MCLR function is tied to the internal Vdd, and the pin is assigned to be a GPIO. When pin GP3/MCLR/Vpp is configured as MCLR, the internal pull-up (notice the singular) is always on.

When MCLR bit =1, it appears the configuration description is “MCLR_ON.” (So, “MCLR_on” means not configured as MCLR and “MCLR_off” means it is so configured. )

Question 1: It seems clear that when MCLR bit=0 (MCLR_OFF), internal weak pull-up is enabled for the corresponding pin 4 (GP3). Is internal weak pull-up for that pin not allowed with MCLR_On (bit=1), or can it still be set using the OPTION register without affecting whether MCLR will be on or off?

Question 2: Can weak pull-ups still be enabled for the other pins (pin 7/GP0 and pin 6/GP1) when MCLR is ON? (At the bench, it seems that is the case, but I don’t know how to tell the status of the MCLR bit while the chip is actually running. On the scope, it looks high, but the configuration is 0FFA, MCLR_ON.)

Question 3: If weak pull-ups on GP0 and GP1 can be set independently from GP3, isn’t that somewhat pin selectable and inconsistent with this statement:

Section 5.1: The wake-up on change and weak pull-up functions are not pin selectable. If pin 4 is configured as MCLR, weak pull-up is always on and wake-up on change for this pin is not enabled. (Again, note the singular noun and verb.)

Thanks. John

 

[nickelflippr]

Without getting caught up in the precise wording, I think of the MCLR pin as Off Limits for setting the TRISGPIO as output, and then setting that pin High. Use would be regulated to an input pushbutton, or non return to zero data line.

As far as your other questions, looking up the special features section/config, it explains the !MCLR thing. MCLR is going to be set high, either by the Option register, or config. If you are out of pins, get a higher pin device, or get creative.

 

[jpanhalt]

As far as your other questions, looking up the special features section/config, it explains the !MCLR thing. MCLR is going to be set high, either by the Option register, or config. If you are out of pins, get a higher pin device, or get creative.

By set high, do you mean the bit is set to =1; or do you mean the voltage at the pin is set high by the weak pull-up (i.e., bit=0)? I intend to use ICSP for the completed design.

As for pins, I have plenty and in the final design will probably be using a 12F6xx to give me two timers. In my very limited past experience with this chip, I simply set MCLR to whatever was needed to make the chip and program work. In this case, I thought it would be nice to try to understand it.

John

 

[jpanhalt]

FOLLOW-UP
After much more reading -- some of it more confusing and conflicting than my original question -- here is what I have concluded:

1) When Pin 4 is configured as GP3 (i.e., MCLR_off, bit=0), one can set it with or without weak pull-up just as one would for GP0 and GP1 using OPTION. In that case all three pins are set either with pull-ups or not.

2) When Pin 4 is set as MCLR (i.e., MCLR_on, bit=1), it has a weak pull-up enabled; however, one can still have or not have weak pull-ups for the other two pins set using OPTION. That is, the weak pull-up for Pin 4 when set as MCLR is independent of the weak pull-ups set by OPTION.

Is this interpretation is correct?

Thanks.

John