Can someone help clarify the following (Device=12F509) :
It seems that in the “unprogrammed” state of MCLR, the MCLR bit is set to 1 . That enables external control. When programmed (bit=0), the MCLR pin is said to be configured as MCLR:
When programmed, the MCLR function is tied to the internal Vdd, and the pin is assigned to be a GPIO. When pin GP3/MCLR/Vpp is configured as MCLR, the internal pull-up (notice the singular) is always on.
When MCLR bit =1, it appears the configuration description is “MCLR_ON.” (So, “MCLR_on” means not configured as MCLR and “MCLR_off” means it is so configured.
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Question 1: It seems clear that when MCLR bit=0 (MCLR_OFF), internal weak pull-up is enabled for the corresponding pin 4 (GP3). Is internal weak pull-up for that pin not allowed with MCLR_On (bit=1), or can it still be set using the OPTION register without affecting whether MCLR will be on or off?
Question 2: Can weak pull-ups still be enabled for the other pins (pin 7/GP0 and pin 6/GP1) when MCLR is ON? (At the bench, it seems that is the case, but I don’t know how to tell the status of the MCLR bit while the chip is actually running. On the scope, it looks high, but the configuration is 0FFA, MCLR_ON.)
Question 3: If weak pull-ups on GP0 and GP1 can be set independently from GP3, isn’t that somewhat pin selectable and inconsistent with this statement:
Section 5.1: The wake-up on change and weak pull-up functions are not pin selectable. If pin 4 is configured as MCLR, weak pull-up is always on and wake-up on change for this pin is not enabled. (Again, note the singular noun and verb.)
Thanks. John