;
; build scan data array for next display interrupt cycle.
; all the b7 bits in one byte, b6 bits in the next byte,
; and so on. Bit 0 <CLK> is preset to '0' in each byte.
;
; 153 cycles, 30.6-usecs
;
lfsr 0,SBuff ; scan buffer address
V1 rlcf WBuff+0,f ;
rlcf INDF0,f ;
rlcf WBuff+1,f ;
rlcf INDF0,f ;
rlcf WBuff+2,f ;
rlcf INDF0,f ;
rlcf WBuff+3,f ;
rlcf INDF0,f ;
rlcf WBuff+4,f ;
rlcf INDF0,f ;
rlcf WBuff+5,f ;
rlcf INDF0,f ;
rlcf WBuff+6,f ;
rlcf INDF0,f ;
bcf STATUS,C ;
rlcf POSTINC0,f ; set b0 <CLK> bit to '0'
btfss FSR0L,3 ; all 8 SBuff bytes setup?
bra V1 ; no, branch