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Can I leave a comparator output floating?

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Speakerguy

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I am using a dual comparator and only need one of the circuits. I have the inputs of the other tied to VCC and Ground since I know you shouldn't leave inputs floating and this will put it into a constant 'high' out, but should I load the output at all? Part is a TLV3702 from TI.
 
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I used a LM393 the same way. Just make sure you bring the inputs high or low to avoid the comparator switching and going crazy. Some 74HC chips do that.
 
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As long as the inputs of the unused device are terminated, the floating output will not be a problem. The output is standard CMOS push pull, kinda self terminates.
 
I was pretty sure it was OK, but wanted to check. Sweetness. One less resistor. The inputs will tie into my supply planes so no problem there.
 
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As long as the inputs of the unused device are terminated, the floating output will not be a problem. The output is standard CMOS push pull, kinda self terminates.
I agree, but Fig. 2 in the datasheet has me baffled. How/why would they characterize open collector leakage current on a push-pull CMOS output stage?
 
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It is weird. Maybe it is due to the fact that they also mention, on page 2, the TLV340x and TLC393/339 series which are open drain. This brings us a little closer to an "open collector" but not quite. Looks like someone got carried away with cut & paste.
 
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Wow, I read the data sheet closer and I had no idea how slow the TLV version was. I guess I will be getting the TLC3702 instead, unless someone has a better recommendation. Supply voltage is 14.4V single supply.
 
Could someone explain the concept of 'overdrive' to me?
I'll try.:eek:
A comparator is really just a high-gain amplifier. With low overdrive, the low bandwidth of the "amplifier" begins to rear its ugly head, so to speak. Let's say you have a gain of 10,000, and Vcc=10V, Vee=0. Oversimplifying, it will then only take an input differential of 1mV to drive the output rail-to-rail. Let's say you have an open loop bandwidth of 1kHz (sounds low, but it's realistic). That corresponds to a time constant of about 159us. OK, so if I drive the input differentially from -1mV to +1mV in, say, 10ns (fast, in other words), the output (assuming a linear amplifier) will try to swing exactly -10V to +10V, but the output is limited initially to zero volts.
Vout=Vf*(1-e^(-t/RC))
To reach Vout=5V (the 50% point),
5=10*(1-e^(-t/RC))
1-e^(-t/RC)=0.5
e^(-t/RC)=0.5
t/RC=-ln(0.5)
t=0.693*RC
t=110us to reach 5V with 1mV of overdrive.

Now let's drive the input differentially from -50mV to +50mV, still in 10ns. With 50mV of overdrive, the output starts at GND and heads for (50mV*10,000) 500V. The -50mV just served to keep the output at zero. Ok, how long does it take for the output to reach 5V?

V=Vf*(1-e^(-t/RC)).
To reach Vout=5V (the 50% point),
5=500*(1-e^(-t/RC))
1-e^(-t/RC)=.01
e^(-t/RC)=-0.99
t/RC=-ln(0.99)
t=-RC*ln(0.99)
t=159us*0.01
t=1.6us to reach Vout=5V with 50mV of overdrive.
If you calculate the time to reach 10V, it will be about 3.2us.
(I hope I got all the parentheses paired up, etc.)

This is what overdrive does.

A real comparator is not a linear amplifier. It generally has at least a couple of limiting amplifiers in cascade, so the response time will not be linearly proportional to the overdrive as it is in this case, but the principle is the same.

Below is a schematic of the circuit described above, and the .ASC file, in case anyone wants to simulate it in LTspice.
 

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