Clock Countdown to Zero

[LudacrisLogic]

I am trying to make a clock that counts down from 8 minutes using three seven segment displays. I need to use the 74LS series of IC chips and I understand how to cascade the clocks. My problem is that once the circuit is clocking, it goes 9, 8, 7, 6, 5, 4, 3, 2, 1, then resets to 9 without stopping at zero. I have tried the 193, 192, 191, 190, and even tried using flip flops, but I can't figure it out. I keep thinking its a simple thing I keep overlooking, but I don't know what it is! Please help!

 

[3v0]

post your schematic(s).

 

[LudacrisLogic]

View attachment 63226

This is one 9-0 counter, the other two for the 8 minute timer will be basically the same.

 

[crutschow]

As I suspected, you are loading the counter when the count reaches zero. But since the LOAD input is asynchronous, as soon as it gets the LOAD signal, it immediately loads the nine and you never see the zero since it only takes a few nanoseconds to load.

The way around that is to LOAD the counter when it counts the first count below zero or 15 (generate the LOAD on all 1's). In your circuit you can just eliminate all the inverters and connect the counter outputs directly to the 4-input NAND gate.

 

[LudacrisLogic]

Thanks for the reply, I tried removing all inverters and putting the outputs straight to the nand gate, but now it just counts 9,8, reset. Any suggestions?

 

[crutschow]

Thanks for the reply, I tried removing all inverters and putting the outputs straight to the nand gate, but now it just counts 9,8, reset. Any suggestions?

Sounds like you are getting a glitch from one of the outputs as it goes from 8 (1000) to 7 (0111). The MSB may go low slightly slower than the other three bits go high, giving a momentary 1111 and causing the counter to load. You might try adding a small capacitor (say 0.01μF) between the NAND gate output and ground to suppress the glitch and see if that helps.

 

[LudacrisLogic]

Sorry for my confusion, but I tried that and it's still not working. Why would the counter ever output all ones if it is set to count from 9-0?

 

[crutschow]

Sorry for my confusion, but I tried that and it's still not working. Why would the counter ever output all ones if it is set to count from 9-0?

Not all outputs change state at exactly the same time. So during the transition from 1000 to 0111 it could be possible for 1111 to appear for a few nanoseconds. This could be long enough for NAND gate to go low and cause the LOAD function of the counter.

But if the capacitor didn't help, then perhaps you have a different problem. Did you double-check all the wiring?

Do you have an oscilloscope to monitor the outputs?

Edit: As an alternate you can go back to detecting the 0000 state with the NAND gate but put the output into a a D-FF with the Q output of the FF going to the LOAD input of the counter (and of course the clock going to the FF CLK input). That way the LOAD function will be delayed by one clock pulse, keeping the counter at 000 for that period, and preventing any problem with glitches from the counter outputs.

For future reference you could use a 4-input OR gate to directly detect the 0000 state of the counter. No inverters are needed since the OR gate output goes low only when all inputs are low (basically an OR acts like an AND gate for negative logic).