I'm writing a bit of test code for the STM32F303K8 off the HSI (internal) oscillator and stepping it up to 72MHz via the PLL. The reference manual says that 2 flash wait-states are required at this speed. However, the code seems to run with just one wait state. Can anybody provide insight into this?
My guess would be that the prefetch buffer (which is enabled) combined with the very small program just happens to allow the next instruction to always be in the buffer so there are no guarantees that this would always be the case.
My guess would be that the prefetch buffer (which is enabled) combined with the very small program just happens to allow the next instruction to always be in the buffer so there are no guarantees that this would always be the case.