Common clock for 2 PICs - Circuit needed

In spite of my vast(?) archive, couldn't find a clock circuit good to provide a reliable clock (from 4 up to 16 MHz according to xtal) for 2 (eventually 3) PICs working in parallel. Basically, 16F84A whose software is being reworked and happily well improved

Can anyone direct me directly to a reliable circuit?

Thanks for any help.

atferrari said:

In spite of my vast(?) archive, couldn't find a clock circuit good to provide a reliable clock (from 4 up to 16 MHz according to xtal) for 2 (eventually 3) PICs working in parallel. Basically, 16F84A whose software is being reworked and happily well improved

Can anyone direct me directly to a reliable circuit?

Click to expand...

As I understand it, and there was a very old datasheet at MicroChip that showed how to do it, you can connect the output oscillator pin of one PIC to the oscillator input pin of the next - with the first one having the crystal connected.

But all you need is a TTL/CMOS clock signal, an external gate oscillator and buffers could feed as many as you want.

However, I'm fairly doubtful as to the reason for wanting to do this? - mostly when people ask about this they are going about things the wrong way?.

Consider using a canned clock oscillator. Seems to me that every PIC can be driven on one clock pin with one of these. Check the data sheets. All you have to do now is hook each PIC to the canned oscillator. Be aware, the oscillator will have a fan out figure, i.e., it is limited as to how many circuits it can drive. But, if you're only driving two or three PICs and they are close to the clock, this shouldn't be a problem.

End two cents.
kenjj

Problem solved

However, I'm fairly doubtful as to the reason for wanting to do this? - mostly when people ask about this they are going about things the wrong way?.

I don't think so this time, Nigel. Two PIC generating a sine wave. To ensure they are really synchronized, I feed them with the SAME clock.

Got the circuit I was looking for. Gracias for replying.

atferrari said:

However, I'm fairly doubtful as to the reason for wanting to do this? - mostly when people ask about this they are going about things the wrong way?.

I don't think so this time, Nigel. Two PIC generating a sine wave. To ensure they are really synchronized, I feed them with the SAME clock.

Click to expand...

In that case you might have a valid reason

However, don't forget to feed them both from the same external reset generator - so the reset together.

If the method of sin wave generating is done using table lookup via a phase accumulator, then using two PICs to generate a synchronised pair of sin wave is really not a good idea because the phase difference can be different with each reset operation. One cannot be absolutely certain two PICs will all start executing the first instruction at the very same moment.

If the requirement is no phase difference between the sin waves, then you don't need two separate channel.

If the phase relationship is constant, then one PIC is sufficient. Do the table lookup with an offset added to it for the second wave.

Or there are other requirement/limitation that you have not shown us?

Noted

Well noted Nigel and L. Chung

I already programmed them with a key which, when pressed down, steals cycles (loops in fact). In that way, one of the generators can reduce its phase diff. wrt the other. Pressing the other gen's key, phase diff. increases. Not so bad, I think.

I didn't considered the common reset. Would you believe, Nigel, that adapting the reccomended reset circuit in the manual TO BOTH, would be the right thing? I will try that as soon as I solder both circuits.

BTW this is a challenge to myself: modifying a previous (too) simple design using some of the so many 16F84A I still have around.
I managed to get a simple albeit useful low frequency sine generator with up/down control, fixed frequencies and phase change.

Find the results satisfying. Being already involved with a 18F452 I had to revisit urgently the handling of PCLATH that I had almost forgot about.

Thanks for replying.

atferrari said:

Well noted Nigel and L. Chung

I already programmed them with a key which, when pressed down, steals cycles (loops in fact). In that way, one of the generators can reduce its phase diff. wrt the other. Pressing the other gen's key, phase diff. increases. Not so bad, I think.

I didn't considered the common reset. Would you believe, Nigel, that adapting the reccomended reset circuit in the manual TO BOTH, would be the right thing? I will try that as soon as I solder both circuits.

Click to expand...

Make sure you use a proper external reset generator circuit, that way all the PIC's will reset together - if you use a simple R/C reset, then they will vary slightly - but I suspect you already realised that!.

Common clock for 2 PICs

Having used the reset circuit shown in the datasheet, connected to both /MCLR pins, found that most of the times one of the PICs starts almost always AFTER the other. I wonder if the circuit of one PIC is influencing the other.

Just in case I will do some more testing, probably isolating them with diodes to see if I can ensure a reset at the actual same time.

Will revert with the outcome.

You could synchronize them in software. Execute a sleep instruction on one pic and wake it up with an interrupt from the other.

Alternatively, if you use a pic that has a power up timer function such as the 16F87/8 then you could configure the 2 pics as follows.
Pic1 has internal 8 meg clock with clock out on RA7 and power up timer enabled.
Pic2 uses the clock out from Pic1.RA7 and has the power up timer disabled.

This should allow pic2 to be ready to go before Pic1's clock has started up.

Edit, looking at the data sheet, I don't think the above will work.
What should work is stated in the data sheet.

On power-up, the time-out sequence is as follows: the
PWRT delay starts (if enabled) when a POR occurs.
Then, OST starts counting 1024 oscillator cycles when
PWRT ends (LP, XT, HS). When the OST ends, the
device comes out of RESET.
If MCLR is kept low long enough, all delays will expire.
Bringing MCLR high will begin execution immediately.
This is useful for testing purposes, or to synchronize
more than one PIC16F87/88 device operating in
parallel.

Click to expand...

You would have to put a gate between the RC reset circuit and the reset inputs to ensure they both came out of reset together.

Mike.

Thanks Mike

The second idea looks interesting!

Already implemented the common clock for both PICs but anyway I will keep in my record for eventual future use that could be not too far ahead.

Gracias.

A PIC instruction cycle requires 4 clock pulses.

Regardless of what you do in software, there is still a 75% chance that difference in phase of the two signals by either one,two or three clock pulses on every other startup.

eblc1388 said:

A PIC instruction cycle requires 4 clock pulses.

Regardless of what you do in software, there is still a 75% chance that difference in phase of the two signals by either one,two or three clock pulses on every other startup.

Click to expand...

During sleep no on chip clocks are present. Therefore, I would suggest that the clocks will end up being consistent. As you point out, there is a 1 in 4 chance that they will be exactly synchronous. Worth a try in my book.

Mike.

P.S. What is your suggestion for synchronizing 2 pics?

Mike.