Continuously rotating SRAM addressing

[Roff]

I think I posed a similar question about a year ago, but I never followed up on the project.
OK, here's the deal. I want to create a 128kX8 continuous loop memory in SRAM (static read-only memory), with a read pointer that is adjustable relative the the write pointer. The write pointer is continuously rotating at a 25 kHz (per address change) rate. The read pointer will be adjustable by subtracting the 8-bit digitized value of a pot from the top 8 bits of the write address, but otherwise will rotate at the same rate, except for transients when the pot changes.
I have been thinking about various ways to do this, and the hard-wired logic method is pretty straightforward, but it takes a LOT of parts. So, I've been looking at PICs. It seems like the SRAM addressing could be accomplished by executing a fixed-execution time endless loop which increments a register, outputs it to the I/O as the write address, then subtracts the A/D from the top 8 bits and outputs that to the I/O as the read address. Of course, there are also read/write controls required, but I think these are relatively straightforward.
One question is, how do I do this on a 17-bit (128k) word? Even the big PICs only have 16 bit words, and anyhow I would like to stick to the 8 bit parts. Can I concatenate 2 or 3 registers? (I'm assuming the 8 bit parts have 8 bit registers).
PS you may have guessed that this is for an adjustable audio delay.

 

[Nigel Goodwin]

Yes, you can use multiple registers to make variables larger than 8 bits, it's just a matter of writing the software to do so - for your 17 bit requirement you would need to use 3 registers giving 24 bits. Or you could even use 2 registers (16 bits) plus a single flag bit.

 

[Roff]

Yes, you can use multiple registers to make variables larger than 8 bits, it's just a matter of writing the software to do so - for your 17 bit requirement you would need to use 3 registers giving 24 bits. Or you could even use 2 registers (16 bits) plus a single flag bit.

Thanks, Nigel. That's great. Can you recommend a PIC with an 8 bit A/D and at least 22 I/Os? I don't need any communications ports or other bells and whistles. The address rate is, as I said, 25kHz, but I am digitizing the audio with a sigma-delta modulator (external to the PIC), which gives me a 1-bit data stream at 200kBPS. I will queue up 8 bits at a time in a serial-to-parallel shift register on the input, and do the reverse on the output. So, I also need a 200kHz clock out, and a few non-overlapping r/w control outputs that occur within each 40us period. I think 22 I/Os will be enough (not including the A/D input).

Ron

 

[Nigel Goodwin]

Thanks, Nigel. That's great. Can you recommend a PIC with an 8 bit A/D and at least 22 I/Os? I don't need any communications ports or other bells and whistles. The address rate is, as I said, 25kHz, but I am digitizing the audio with a sigma-delta modulator (external to the PIC), which gives me a 1-bit data stream at 200kBPS. I will queue up 8 bits at a time in a serial-to-parallel shift register on the input, and do the reverse on the output. So, I also need a 200kHz clock out, and a few non-overlapping r/w control outputs that occur within each 40us period. I think 22 I/Os will be enough (not including the A/D input).

I would suggest looking at the 16F877 (40 pin chip), or one of the 40 pin 18F series, the 16F can run at 20MHz (200nS per instruction), and the 18F at 40MHz (100nS per instruction). Both have 10 bit A2D, which you can configure to read as 8 bit if you like).

 

[Roff]

OK, Thanks. I'll check those out.

 

[eblc1388]

Hi Ron,

This is an interesting project. Just a couple of thoughts about it.

1. As you are using 17-bit for the address of the SRAM, you will need two 8-bit registers and an extra bit. Would you make the extra bit the MSB or LSB?

2. Would you use one 128Kx8 SRAM or two 64Kx8 SRAM?

3. You can easily generate the 200KHz clocking using PIC PWM hardware. But then you will not know the exact moment when clocking on the SR occurs(which it does 8 times inside a 40us loop) and it may occurs at the same time as you are performing a write operation to the SRAM making the data unstable. This might be irrelevant to the actual setup but if it does, I would generate the 200KHz inside the 40us loop instead so that I know exactly when clocking occurs.

 

[Roff]

Hi Ron,

This is an interesting project. Just a couple of thoughts about it.

1. As you are using 17-bit for the address of the SRAM, you will need two 8-bit registers and an extra bit. Would you make the extra bit the MSB or LSB?

2. Would you use one 128Kx8 SRAM or two 64Kx8 SRAM?

3. You can easily generate the 200KHz clocking using PIC PWM hardware. But then you will not know the exact moment when clocking on the SR occurs(which it does 8 times inside a 40us loop) and it may occurs at the same time as you are performing a write operation to the SRAM making the data unstable. This might be irrelevant to the actual setup but if it does, I would generate the 200KHz inside the 40us loop instead so that I know exactly when clocking occurs.

1. I'm thinking MSB.
2. I have tentatively selected a 128kX8 part.
3. Thanks, LC, that makes sense.

 

[williB]

you would need to select a specific chip(ram) first .
i would choose a 16k x8 one to start with or smaller just till you get the bugs worked out.
you need to digitize the song or sound (a seperate operation)
set up a clock ( your refresh/update rate)this will cycle your ram addresses (can be done with a few counters)ie four 16bit counters
in fact after you choose a ram chip , no one says that you have to use all the addresses ..you could test it with just using part of the total address space.
then you have to use a digital to analog chip to get the sound back..if i may recommend an 'analog devices' chip, with a built in D/A ,that will make things easier , it could digitize the sound , then you would need to send it to ram
then when you need to replay the sound you send it back to the converters d/a section ,i havnt looked at the a/d converter i have in mind ,in a while ,but maybe some googleing will turn up something.look for an a/d with a built in dac.

 

[Roff]

Willi, thanks for your input.
For the audio, I plan to use a sigma-delta converter, which is a single-bit digitizer. It produces what is basically a PWM bit stream (mine will tentatively be at 200kHz). The D/A is just a lowpass filter. Since this is for AM radio, I am planning a 4-pole Butterworth with a 5kHz corner.
I am planning to use a 128kX8 SRAM (which I mentioned in my first post).
I started out designing the controller with counters, shift registers, an A/D for the delay-setting pot, etc., but the amount of hardware was becoming prohibitive. That's why I'm considering a PIC.

 

[philba]

Hmmm, have you considered using an SPI DAC chip and the onboard PIC ADC? Then you wouldn't have to deal with shift regs and thus not need the high sp clock. Thare are some micros that have built in DACs but I don't think any PICs do.

Also, if you only record the message infrequently, you could use an SPI (or I2C) eeprom and really cut down on the number of pins you need. It wouldn't work for audio delay because of the life span of the eeprom.

I don't think there are serial SRAMs out there but that would be ideal - then you could do it with a small PIC like the 16F88.

edit: forgot to mention. there is a microchip ap note on interfacing external memory - https://www.electro-tech-online.com/custompdfs/2006/10/00869b.pdf

 

[Nigel Goodwin]

Hmmm, have you considered using an SPI DAC chip and the onboard PIC ADC? Then you wouldn't have to deal with shift regs and thus not need the high sp clock. Thare are some micros that have built in DACs but I don't think any PICs do.

Also, if you only record the message infrequently, you could use an SPI (or I2C) eeprom and really cut down on the number of pins you need. It wouldn't work for audio delay because of the life span of the eeprom.

I presume, from what he said, that it's designed to record in real time, or perhaps delay? - and EEPROM is too slow for that. If all he wanted was to record a message and repeatedly play it back - then an EEPROM is fine, and you can record via a PC then transfer to an EEPROM for playback via a PIC. EPE did a project for that last year - I've got it all built, but keep forgetting to order the EEPROM - and I sent an order off last Friday!!

 

[Roff]

Hmmm, have you considered using an SPI DAC chip and the onboard PIC ADC? Then you wouldn't have to deal with shift regs and thus not need the high sp clock. Thare are some micros that have built in DACs but I don't think any PICs do.

Also, if you only record the message infrequently, you could use an SPI (or I2C) eeprom and really cut down on the number of pins you need. It wouldn't work for audio delay because of the life span of the eeprom.

I don't think there are serial SRAMs out there but that would be ideal - then you could do it with a small PIC like the 16F88.

edit: forgot to mention. there is a microchip ap note on interfacing external memory - https://www.electro-tech-online.com/custompdfs/2006/10/00869b-1.pdf

Philba, I haven't been ignoring you. I've just been contemplating your A/D ideas. You bring up some good points. I have always had A/D - D/A in the back of my mind for this (I used to design video A/Ds in the early '70s, before integrated ones were available). I have long been interested in sigma-delta A/Ds, and I like the lowpass filter for conversion back to analog. However, there doesn't seem to be any real benefit in sigma-delta conversion for me. I'm looking into it further.

 

[philba]

I didn't expect a response but thanks anyway.

By the way, the MSP430 micro line from TI has several versions with a SD ADC built in. They do all the shifting so you see 16bits. very easy to use. there is one on the $20 dongle they sell (ez430, iirc). It's a complete development system. well done over all. Several of the 430 line has both ADC and DACs. The fact that the 430 is a 16 bit processor doesn't hurt.

Also, many chips in the Renesas 16 line have both ADCs and DACs built in and a number of them also have a direct SRAM interface. The one I have also has 2 DMA channels that allow the ADC as a source and the DAC as a destination. You almost wouldn't have to write any code (ok ok, it's not THAT simple). Your application could be as simple as the micro, the SRAM and filtering. 16 bit processor as well. some of them have quite a lot of RAM - 31K (I don't know why it's not 32K) so you might not even need SRAM though those are pretty big and, I assume, pricey chips.