A JK flip flop is one of the variants of clocked or synchronous style bistable.
An SR bistable (aka flip flop) in not synchronous, it switches state as soon as either a set or reset signal is present.
The simplest clocked one is a D type; the output (Q) is set to match the D (Data) input only when the clock input changes from low to high.
Connect the inverse output /Q (not Q) to teh D and it will change state each time the clock changes to high, dividing the clock frequency by two.
Connect two or more Q out to D in, and clock them together, you get a shift register.
A JK bistable has two control inputs and extra logic included. If both are low, nothing happens when it is clocked. If J is high and K is low, Q is set high when the clock occurs; J low and K high, Q is set low when clocked. Connect Q to J and /Q to K and again you get a shift register.
Set both J and K high, and it alternates (divide by two) at each clock.
Most D or JK etc. type have reset and often set inputs as well, that force an immediate state change, like SR.
Those are most often used as part of a power-on-reset sequence so everything starts in a defined state, but can be used in other ways.
This video may be helpful: