curen sink activation of gates

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JoeRandom

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I am currently working on designs for a project that involves splitting a signal 2 ways depending on the state of a sensor. I have been thinking of using gates, e.g. a NOT gate then an AND gate for 1, and for 2 just an AND gate.

BUT here is my problem my sensor is current sink only (up to 40mA 15 volts dc) but for the gates to work do i not need a positive input? i was thinking of using an opto-coupler



the frequency of the signal to be split will be between 0 and 475Hz
i wold prefer a delay time of less than 32 ms( over the hole cercit ) 16 wold be optimum
 
JoeRandom said:
can some one please tell me if this will work sorry if i stupid noob **broken link removed**
Click to expand...

hi joe,
If you use a standard logic gate, wont the output of gate swamp/saturate the opa's.

Whats the amplitude of the incoming analog signal? and is it referenced about/to the common rail.?

EDITED:
Just realised the opa symbols you have used are supposed to represent AND gates!
A HEF4053 would give a single ic solution.
 
Last edited:
Hi Joe,

The optocoupler isn't necessary. Connect R2 between the supply
voltage of the gates and the sensor and connect the gates to the
sensor. The circuit will function as before, only output 1 and
output 2 will be reversed.

on1aag.
 
ok soty for the mis-drawn digram it was about 1 am here the amlatude of the incoming signal is 11~15V pulsed dc eg 0v +13v 0v +13v.... can be reduced by resistors ect.

So in summary al i want I want to achieve is a logic gate with the following truth-table

Input output
A B 1 2
_______________
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 0

out puts will be boosted to on / of signals by mosfets in or similar to achieve 13~20 v dc pules at around 20~40A so it doesn't mater if it is analog or digital rely im just after a fast response time
 
Duh *hits self in head

quad 2 in NAND gate is a simple 1 IC solution as demonstrated here this shold work am i correct? **broken link removed** EDIT:

no it wont will it

but this will **broken link removed**
 
Too many roasts?? Toasts?

Why do idixxx, oops I mean people call a logic inverter "a NOT gate"?
It isn't a gate. It is an inverter.
 
audioguru said:
It isn't a gate. It is an inverter.
Click to expand...
Exactly! It's a NOT gate or NOT a gate.
quad 2 in NAND gate is a simple 1 IC solution as demonstrated here this shold work am i correct?
Click to expand...
Both circuits should work the same way assuming "sensor 1" is just a pair of contacts.
 
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Why do some people save schematics as a smeared and fuzzy JPG file type when a GIF and a PNG file type are extremely crisp and clear?
 
I guess most people don't understand that the JPG algorithm is optimized for photos and GIF/PNG work better with cartoon type graphics. GIF or PNG will compress a schematic to a smaller file size than JPG and look a hell of a lot better to boot!
 
i have rightly cocked that up

**broken link removed**

this is what I think i wanted to draw before I had a phat stress at my telecommunications provider and go to angry to think properly

SENSOR 1 =


LOOK AT THE *.GIF FILE
 
Last edited:
hi,
I see that you have drawn the output from your two gates going to OPA inputs?

I'll ask again:
Whats the amplitude of the incoming analog signal? and is it referenced about/to the common rail.?

In other words is it a TTL logic signal or a Analog signal?
 
ericgibbs said:
hi,
I see that you have drawn the output from your two gates going to OPA inputs?
Click to expand...
it wold be used for running 2 of these off of each out put signal
**broken link removed**
TR1 Standard Ignition Coil
T1 BFY51 Small Transistor
T2 2n3055 Power Transistors
R1 100 Ohm Resistor
D1 1N4007 Diode
RC1 0.1µF Capacitor + 10K Resistor
Click to expand...

or 1 of these off each output
**broken link removed**

or similar the signal in these doesn't have to be out of sink







ericgibbs said:
I'll ask again:
Whats the amplitude of the incoming analog signal? and is it referenced about/to the common rail.?

In other words is it a TTL logic signal or a Analog signal?
Click to expand...

the input signal may look like this**broken link removed**

the frequency will be between 0hz 16hz (norm min) and 250hz (max)

the corners of the wave may get a bit sign-ish

i am not shore if it is digital or an analog.

the high points of the wave are 11 - 15 volts (norm 13)

EDIT: HALF WAVE^

the "on" period will always be the same the "off" period will change with the frequency of the input
 
Last edited:
hi,
Forget the 2nd circuit option, its not going to work as you expect.

The 1st circuit option looks Ok, but it needs some small changes/additions.

As you are inputting nominal +12v [15Vpk] square wave signals you cannot directly use standard TTL logic to select the signal destination.

Can you confirm that the incoming signal frequency is less 500HZ?

As the Hall effect device is designed for 15V operation and is capable of sinking upto 40mA why are you considering a opto-isolator?

What are driving with the ignition coil EHT output?
 

ok thanks yep the in put is less than 500hz.

am thinking of using farchild AND gates a well as inwerters
https://www.electro-tech-online.com/custompdfs/2007/11/ZC4081.pdf

was not thinking wen sagested opto curlers
 
hi joe,
Those gates look ok to me, just make sure that you protect them from transients greater that +15V. Especially as its close to/working with an ignition coil.

Post your final circuit when you are ready.
 
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