Current Limit

[mrd]

Hi,

I am trying to do a current limiter with a current sink. To cut down the in rush caused by a dc dc converter I'm using. However I would like the limiter to be 'lifted or raised' after the inrush.

So far I have a circuit that 'half works'. Have simulated and also built for real.

In real, when I turn on first time it limits fine to around 130ish mA. Same 2nd time, 3rd time. Then I left for a while, came back to it, turned on first time (fine), however 2nd time and 3rd time it wasn't limiting at turn on (190mA, 230mA etc)

I assume my circuit isn't ideal. Can someone suggest a better implementation?

https://i40.tinypic.com/2cniex3.jpg

(Theres the circuit, with added delay to turn converter on)

 

[shortbus=]

This is what you need; **broken link removed**.

It's actually called a ' inrush current limiter'

 

[mrd]

This is what you need; **broken link removed**.

It's actually called a ' inrush current limiter'

Hi, thanks. The reason I did not go for that approach is because I believe that the thermistor needs a certain time to cool before I can turn it limits again. So not ideal for what I need.

I guess to sum up in a question what I'm looking for it would be:

Why sometimes when I turn it on, do I get 180mA, 230mA readings when I have it set to limit at 130ish mA?


Is the FET not opening fully sometimes? (I suspect this could be the case, in which case is there something I can do to remedy this?)

Or is the 470uF cap not discharging? So the power transistor has 2.5ohms to -V?

Or is the current sink normally this temperamental?

Thanks

 

[mneary]

I don't see anything that limits the +Vin. What is the name of that signal plotted in dark blue against the black background?
The input power source is center grounded but I don't see any ground reference in the rest of the circuit or maybe the jpeg is too blurry.
I think you would learn a lot if you measured the voltage on C3 and C4 during operation.
For modeling purposes, you should have diodes in series with +16V and -16V so the power supply doesn't discharge anything when it's turned off (unless there are other loads).

 

[mrd]

I don't see anything that limits the +Vin. What is the name of that signal plotted in dark blue against the black background?
The input power source is center grounded but I don't see any ground reference in the rest of the circuit or maybe the jpeg is too blurry.
I think you would learn a lot if you measured the voltage on C3 and C4 during operation.
For modeling purposes, you should have diodes in series with +16V and -16V so the power supply doesn't discharge anything when it's turned off (unless there are other loads).

Hi,

It's not +Vin that's getting limited, just the current from powersupply feeding it. Essentially I'm using the full 32V to go into the isolated dc converter. Only using 0V for the pi filter. It's +V the blue. And current of PSU on the green axis. Sorry about shoddy picture. Lost alot of res on upload

Ill see if I can get some readings of what the 470uF (C3) is doing in real life
thanks

 

[mneary]

Lost alot of res on upload

Lost a lot of res on jpeg. try png.

 

[indulis]

What is the DC-DC converter your using, and what is the application?

Every DC-DC converter has "soft-start" to limit/control the rate at which the output comes up. This is done by clamping the error amp output to the voltage on the "soft-start capacitor", so the duty cycle will be limited as it starts and along with it the input current. If the unit has a "large" bulk input capacitor, that could be your issue. Other limiting circuits use a MOSFET with parallel resistor in series with the input return leg and a RC on the gate. When the unit is turned on, the resistor limits the current and after the capacitor is charged to a certain level it turns on the MOSFET shorting out the resistor.

 

[mrd]

What is the DC-DC converter your using, and what is the application?

Every DC-DC converter has "soft-start" to limit/control the rate at which the output comes up. This is done by clamping the error amp output to the voltage on the "soft-start capacitor", so the duty cycle will be limited as it starts and along with it the input current. If the unit has a "large" bulk input capacitor, that could be your issue. Other limiting circuits use a MOSFET with parallel resistor in series with the input return leg and a RC on the gate. When the unit is turned on, the resistor limits the current and after the capacitor is charged to a certain level it turns on the MOSFET shorting out the resistor.

Hi,

It's this converter **broken link removed**

So is there any glaring mistakes with my circuit that would cause it to sometimes draw more than 135mA on turn on?

I've uploaded a PNG here how http://i40.tinypic.com/2cniex3.jpg

Also I've added series diodes as was suggested, and this DOES change the simulation and reflects what I am getting in real life. ie. the 470uF doesn't take as long to charge, the 3rd time it's turned on.

I assume this is my problem? Any ideas on ways to rectify this?


Thanks

 

[mrd]

Hi,

So I've managed to get it to behave if I have a bleed resistor over the voltage inputs.

However, sometimes, M1 (the fet controlling the higher current limit) doesn't start.

Would a 1MEG resistor (on gate/source) fix this? or is there another tactic?

Thanks


(Unfortunately it's an intermittent problem, so not sure if it'll fix it by trying)

 

[mneary]

M1 should always conduct when the zener diodes are conducting and there's enough voltage left over for the gate (after charging C3). This is probably a total of 10 +10 +7V.

 

[mrd]

M1 should always conduct when the zener diodes are conducting and there's enough voltage left over for the gate (after charging C3). This is probably a total of 10 +10 +7V.

Hi, Thanks.

The circuit has been turning on fine ever since, so not sure what the problem was.

The only problem now is, that I'd like it to 'reset' quicker. If I turn it back on within around 10sec, it will draw too much current.

I've been trying to tweak the circuit. Perhaps this circuit is better?

https://i41.tinypic.com/dmac9i.jpg

Would that work better?

 

[mneary]

It turns around better, and is quicker to apply full power to the converter.

 

[mrd]

It turns around better, and is quicker to apply full power to the converter.

Hi thanks. Ok so maybe I'm on the right lines. Do you think if I wanted a slightly longer delay before the current limit is raised (M1), maybe I can push R3 up to 750k or even 1MEG?

I'm assuming the 'reset' delay will still be quicker because I'm using a small cap?

 

[mneary]

Yes, the smaller cap makes both times shorter.

You should state your goals first, then a design will be a lot easier. How long do you want the delay? How fast is an acceptable recovery?

 

[mrd]

You should state your goals first, then a design will be a lot easier. How long do you want the delay? How fast is an acceptable recovery?

Very good point!

I guess my ultimate goal in an unreal world would be '8 sec turn on delay, with 0.1sec recovery.

Now, a more practical goal I guess would be a 2 sec recovery, with a 6 sec delay turn on.

I'm not entirely sure what's possible in real world, but somewhere along those lines, I'm looking for.


Thanks again for your help

 

[mrd]

Hi,

Would something like my implementation of a pnp transistor (bottom right of schem) work for delay start up, but very fast 'reset' (discharge)? Seems to sim out ok. Any pitfalls I've fallen into or should be aware of!?

https://i41.tinypic.com/r6xnhj.jpg

Thanks

 

[mneary]

No problems jump out at me.

Could you post the .asc? I would like to probe a few points....

 

[mrd]

No problems jump out at me.

Could you post the .asc? I would like to probe a few points....

Sure. Thanks alot for the help. I appreciate it.

 

[mneary]

Had it all typed up and the site went down. I hope I'm remembering everything....

I substituted some default spice models, because I'm missing some of the ones on your diagram. I saw disturbing base-collector current (10 amps) in Q5, so I looked further.

I borrowed from a MOSFET driver circuit I've seen elsewhere and came up with the attached circuit. Q5 discharges C3 as soon as the threshold set by R23 and the new R5 cause Q5 to conduct. I reversed D1 to protect the b-e junction of Q5. The new D5 isolates us so C3 doesn't charge through R5. Q5 is not particularly critical. I grabbed 2N2907 because it was in the sim list. 2N3906 or BC556-7-8-9-60 would be fine, too.

It now recovers in a few hundred milliseconds yet can have a delay as long as you like.

You might want to protect the gate of M1 with a zener.

 

[mrd]

Hi,

Thanks once again for your help.

I'm wondering if you could tell me a bit more about the base-collector current you see.. When does this happen? I put probe current at each pin of transistor but highest I see is 140mA. I suspect I'm probing wrong.

Thanks for the circuit. Great. As space is a bit of an issue, I'm wondering if perhaps D1 is critical? If it is, then I'm sure I'll find a way, but not sure.

I was wondering about a zener across gate/source. On the sim, it seems my two resistors are protecting it (do they form a voltage divider?) Again, not sure.

Thanks