It is probably an easy question, but unfortunately all the books I found go only upto 180 degrees in explanation part.
If my phase detector for PLL is D-flipflop with Reset, what what the output be when the input B is lagging input A (reference) by 180 to 360 degrees?
Assume the inputs have same on time (e.g. 5ns) and same period (e.g. 10ns) and the unput A is leading input B by 7.5ns (270 degrees). Should the output Qa stay on until the output Qb goes on, or should it go off after 5ns and then go on after another 5ns, so both outputs would be reset.
Thanks,
Vitaliy
If my phase detector for PLL is D-flipflop with Reset, what what the output be when the input B is lagging input A (reference) by 180 to 360 degrees?
Assume the inputs have same on time (e.g. 5ns) and same period (e.g. 10ns) and the unput A is leading input B by 7.5ns (270 degrees). Should the output Qa stay on until the output Qb goes on, or should it go off after 5ns and then go on after another 5ns, so both outputs would be reset.
Thanks,
Vitaliy