a better way to make a PLL detector is to take a flip-flop, connect Q to the RESET pin of a 555, make an oscillator out of the 555 timer with components having low tolerance rate (1% or less is good)
connect one input of an XOR gate to the output of a 555 timer Connect the other input to the signal. The signal is also connected to the Set pin of the flip-flop. I am referencing to the 4013 for the flip-flop because it accepts +ve as valid input for the SET and RESET pins.
Now when you run the circuit, if the frequency is NOT the same, as the frequency of the incoming signal, then the output of the XOR gate will output a "1" indicating that the signal is out of sync. If the result keeps changing, chances are that one frequency is a multiple of another frequency.
If you all of the sudden change the frequency of the incoming signal to the correct frequency, the signals could still be out of sync, and XOR will output a 1 and 0 continuously.
You can always apply a logic high to a reset pin to force the circuit to try to sync itself once again with the signal.
there is a way that you can have the circuit automatically try to resync itself (automatic flip-flop reset) if the signal is out of phase. Let's see if you can figure it out.