If you have one good output NPN transistor and 2 drivers from 3 to 5V you can achieve lower losses even assuming a current gain of 10
The concept described by Motorola in the 70's was Beta overdrive factor or similar to using 10% of hFE.
To drive this concept home. I simulated the design using a current gain of 10.
Using a gain of 10 with 3MHz BW, you get 300kHz BW.
Using 3V to drive the input stages means only 100mA of power @3V
Then any Load supply such as 24V @1A with only 0.5V Vce(sat) using Ic/Ib=10
The result is only 0.5W is wasted in Q3 driving a 24W load @ 1A
For MOSFETs a similar design is needed in current ratios.
Since Ciss increases with RdsOn , depending on slew rate requirements the effective peak current gain of each stage can be as much as 50 or as low as 10 for max slew rate, which for MOSFETs is only a pulse current during Vgs threshold.
Falstad SIM
Notice the resistor ratios and Beta is only 10 used in each stage, so current levels from input to output are; 1mA , 10mA ,100mA , 1000mA
Then if you have GBW of 100MHz you can expect same results with 10MHz BW.
You can then use lower power transistors.
PLease note that in good MOSFET switch designs to any huge level of current requires multiple stages with the same current gain concept as BJT's except the current is just a pulse during Vgs transition due to input cap. Ciss, which increases for smaller RdsOn devices so for a given family, the
Ciss*RdsOn product is a constant Figure Of Merit. YOu will find good designs use a ratio of 10 to 50 in RdsOn ratios for cascading driver stages, depending on slew rate requirements.
This similar to the ratio used for BJT's depending on if it is a ultralow Vce(sat).
For very low Vce(Sat) Ic/Ib =50 ratings are given, or 20 or the default standard of 10.
This translates into an effective ESR or Rce as it is called by Diodes Inc and can be competitive with MOSFETs ( but $)