How to design 16 to 1 Decimator filter design? I have 12 bit data, 64 Mhz input, and 12 bit data, 4 MHz input. Please, help me how to design it. Thanks
The bandwidth of your 4MHz data will be less than 2MHz (Shannon-Nyquist). Run the 64MHz data through a 2MHz lowpass filter (clocked at 64MHz), then decimate it by saving every sixteenth sample, giving you 4MHz data on this channel with no aliasing. Decimation is simple when the new data rate is binarily related to the old one. It gets complicated if you want to convert 64MHz data to, say, 7MHz data.