Connecting ceramic capacitors in parallel is generally bad practice. Generally (again), the best bypassing is done by having a large bulk electrolytic (or tantalum), something with some amount of ESR to it say 100mOhm or 200mOhm and then a single ceramic cap at the package, with the ceramic cap being the largest value that's cost-effective in its case size.
Frequently I'll read that .1uF caps are better at bypassing HF than say a 1uF or larger. ESL is actually determined mostly by the case size (0805, 0603, whatever) and less dependent on the value (though it is to some degree). Attached are impedance plots for a .1uF, 1uF, and 2.2uF all 10V 0805 size capacitors from Kemet. Note how the high frequency performance converges.
Putting a 2.2uF ceramic and a .1uF ceramic on parallel is bad practice, even though you'll see app notes that tell you to do it. Same with 100nF and 1nF. You end up with good bypassing near the resonant impedance nulls of each capacitor, but in between you can and will usually get a nice LC resonance due to parasitic inductance. I had coworkers that refused to believe me on this point til one of the company's PhD's over in design backed me up on it. There's papers out there on the net with graphs if you care to go looking.