You should read the details from the devices datasheet.
Simply put, the DMA transfers the "burst"-amount of data and then triggers an interrupt or waits for an event or just transfers another block etc. There are many reasons to use short or long bursts.. maybe you don't have much data to move, or maybe you need to move data between many locations and do not want to keep others waiting too long.
EDIT: I mixed burst mode a little bit with "block transfrer" and "dma transaction" there. Basically burst mode is an "atomic" operation for the DMA. It does not let anything interrupt one "burst". Between bursts the CPU may take over. Now.. if that happens while you are transferring 2 byte ADC data (in 1 byte bursts), then the data may get corrupted. At least in Atmel Xmega, the CPU and DMA share the same databus.
This is what Xmega datasheet says:
Since the AVR CPU and DMA controller use the same data buses, a block transfer is divided into smaller burst transfers.
The burst transfer is selectable to 1, 2, 4, or 8 bytes. This means that if the DMA acquires the data bus and a transfer
request is pending, it will occupy the bus until all bytes in the burst are transferred.
A bus arbiter controls when the DMA controller and the AVR CPU can use the bus. The CPU always has priority, and so
as long as the CPU requests access to the bus, any pending burst transfer must wait. The CPU requests bus access
when it executes an instruction that writes or reads data to SRAM, I/O memory, EEPROM or the external bus interface.
.. but, like I said, you need to read the datasheet of your processor.