Do most CPUs have a RSTO line?

Hi everyone.

The 68000 CPU has a RSTO (active when low) that resets external peripherals when the RESET command is executed in supervisor mode. It holds the line low for a while, then continues.

Is this function unique to the 68000, or can all CPUs do it? Note that this doesn't reset the 68000 itself, just anything that's connected to the RSTO pin.

Richard

Maybe theres noone old enough here to remember that chip.

I just checked the datasheet and theres no mention of rsto, are you talking about the 68000, or one of the later 68020 or similar.
If its the 68000 then whats the pin number, sometimes the same pin has more than one reference, that said I dont remember anything like that on the chip, it has a few bus control pins and handshake signals.

It looks like the pin is also known as Reset (active low). See page 537 of the programmer's reference manual here:

https://www.electro-tech-online.com/custompdfs/2012/11/M68000PRM.pdf

Note that this pin is an *output*. The Reset line on an AVR8 is an input. That is to say, if you want to reset the chip you pull reset low for a brief period. But the 68000 will pull its Reset line low in order to reset other peripherals. And as to your comment that no one's old enough to remember that chip, I learned the 68k when it was brand new and I'm 35. And I'm *not* old.

Richard

35 is positively ancient

Actually I'm a few years older than you and remember the "older" chips like the 68000 / Z80 / 8080 etc but the newer ones I've used (PICs mainly) don't have a line that is low on reset - maybe because they have their peripherals and memory onboard so don't see the need.

It would be easy enough to command a modern day microcontroller to do the same - just toggle one of the output pins to low as one of the first commands run in the program memory and bring it high when you've finished initialising stuff.

I meant no insult to your age, only mine.

The 68k from memory has an instruction 'reset', this pulls the reset line low for so many clock cycles, I think it was done this way as when the 68k came out and you'll know this having learned it the device was quicker than some io.
Theres also feedback pins that tell the chip that the memory has had enough time to access and it can carry on.

If you want to implement this with another chip, and the chip doesnt have it (seeing as memory and peripherals are now quicker its logical to assume not many micro's have this function) you could use either an o/p pin on something like a pic and just use a routine that pulls a pin low then high, or if using a micro without ports you could configure the address decoder to give an active low when a particular adress is accessed, then its just a matter of a dummy read or write to reset the peripherals.

Well speed doesn't really come into it when resetting. Executing the reset command pulls the reset pin low for a certain number of clocks, then it goes high again. If you can find a pin on a peripheral chip that will reset the device when pulled low, then you can reset your peripheral chips without resetting the 68k as well. Perhaps pulling Vcc low for a period of time is enough to "reset" the peripheral. Perhaps not.

You might need to add some additional electronics that, when determining that reset has gone low, will continue to hold it low for a little while longer, and then wait for that period in the 68k firmware.

Richard