eagle schematic ERC problem

jpanhalt said:

I thought it was clear that I was not talking about the schematic!
John

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No, but I was referring to posts about the schematic, to which you had replied.

Hi John,

I think the thread's title says clearly that it's all about schematics.

A component always consists of a SYMBOL and a PACKAGE. The symbol grid is normally 0.1" (Eagle standard) while the package grid depends on the package footprint as supplied with the datasheet of the manufacturer.

Both, symbol and package are then combined to make a DEVICE, which carries all information about symbol and package and additionally the assignment of corresponding pins (from the symbol) and pads (from the package).

An ERC with hundreds of error messages related to connections has absolutely nothing to do with a PCB design - at least initially. It will have a relation to the PCB as missing connections on the schematic will not have air wires on the PCB - meaning the component is connected partly or not at all.

Don't try to sell apples for pears please.

Hans

Hans,

Apparently you never read the edited post #13, so I will quote and annotate it here for easy reference.

jpanhalt said:

Can't disagree about the advice on not changing grid size,...

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I thought , that was pretty clearly stated, but apparently it wasn't fully understood by you and DerStrom8.

jpanhalt said:

... but if you really need to do that, just be sure you use a common denominator in the fine/alternate grid setting.

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I have never come across the need to change grid size in a schematic and stated so in the post, but to assume based only on my experience that such a need cannot exist is too big a stretch for me. So, after re-emphasizing that by a conditional statement, I gave a precautionary suggestion of how to do it. Neither you nor DerStrom8 bothered to comment on the content of the suggestion, but instead chose to criticize the units I happened to choose. I tried to clarify that choice with an edit that apparently you still haven't read. In part, I emphasized a line from the original post and added and additional comment.

jpanhalt said:

I don't think I have ever seen the need to change grid size when making a schematic.

Edit: The foregoing example used metric as that was the system used with the component for which I had to use muliple grid sizes to get the right footprint easily. It is meant solely as an example of what I meant by common denominator. In no way do I recommend multiple grids or metric for a schematic for the reasons pointed out by Boncuk, below, and myself, above. Since the OP had not returned to the thread, and the discussion had become more generalized, I though adding this small additional hint on using multiple grids might help others who had not done it before.

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I am not trying to sell apples or pears to anyone. But, I accept that there may be a legitimate need or desire to use different grids in a schematic, which I have yet to encounter.

If you can show there is never a need to do that, then let's drop it. If you can't show that to be the case, then how about sticking to apples and discuss whether the approach I discuss will or won't work.

John

Hi John,

I didn't try to critizise you in any respect.

I rather stick to the thread's title which is :"eagle schematic ERC problem".

That's all about it.

Regards

Hans

hans,
all said, i wantd to have a copy of the .sch and .brd files to be able to analyse and appreciate your problem.
you youi mind please !!!

Please help
When I draw schematic in the eagle 5.6.0, if I use a regular component (BGA) then I can be conect with NET to components, but if you put the SMT components then can not connect with the command NET to component, provided one knows what the problem was.

I don´t really understand what you mean & please make your own thread.

Let me try to explain, if you start to draw a scheme with standard components such as for example housing or DIP8 thru holes component, then in most cases I can drag net with the components, but if the same scheme draw with SMD components like say SO8, SOT23 or resistors in the 1206 housings, they can not ride on the schema components to the net.
GRID I've tried all sorts of measures to entry, but does not work.

View attachment 68092

images when using SMD components

View attachment 68093

images when using thru holes components

mojalovaa1 said:

Let me try to explain, if you start to draw a scheme with standard components such as for example housing or DIP8 thru holes component, then in most cases I can drag net with the components, but if the same scheme draw with SMD components like say SO8, SOT23 or resistors in the 1206 housings, they can not ride on the schema components to the net.
GRID I've tried all sorts of measures to entry, but does not work.

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mojalovaa1, I realize you are new here, so I feel I should tell you. Hijacking someone else's thread is not proper forum etiquette. If someone poses a question in a thread, someone else shouldn't post their own problem in the same thread and expect to be helped. You must start your own, to avoid being rude. Understand?

Regards,
Matt

I apologize, but I see that it is the same thing just the other problem, I have not really planned that this will be a problem because the theme of the title is the same, I also have a problem with the rules of the Eagle when drawing schemes and because I thought it was acceptable topics.
If he throws 100 errors for the scheme, or if I make 100 mistakes when drawing diagrams is not that the same thing is just another problem, there is also a mistake that occurs when drawing diagrams, only that his mistake was false report errors and my one hundred general does not report the errors and I can not draw scheme.

mojalovaa1 said:

I apologize, but I see that it is the same thing just the other problem, I have not really planned that this will be a problem because the theme of the title is the same, I also have a problem with the rules of the Eagle when drawing schemes and because I thought it was acceptable topics.
If he throws 100 errors for the scheme, or if I make 100 mistakes when drawing diagrams is not that the same thing is just another problem, there is also a mistake that occurs when drawing diagrams, only that his mistake was false report errors and my one hundred general does not report the errors and I can not draw scheme.

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Yes, I understand. But even if the problem is the same, you should still start your own thread. It's just more polite to the OP. If you start your own thread, the OP will not continue to get notifications that someone is responding to his thread, when it's really someone else's problem.

There's no need to apologize. I just politely ask that you start your own thread instead of hijacking someone else's. Please understand this isn't anything personal. It's just common courtesy

The problem here is that you're not using 0.1" grid on both schematics. In the schematic editor you must always use 0.1" otherwise as you've already seen things will not connect. In the board editor use whatever is convenient, but in the schematic always use 0.1".

That should take care of your problem.

Please attach your .sch file for the one that is causing problems.

John

https://www.electro-tech-online.com/threads/eagle-schematic-erc-problem.126799/
I solved the problem, the thing is that when drawing grid scheme shall not be less than 0.1 inch
Regard

mojalovaa1 said:

https://www.electro-tech-online.com/threads/eagle-schematic-erc-problem.126799/
I solved the problem, the thing is that when drawing grid scheme shall not be less than 0.1 inch
Regard

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It can be less than 0.1 inch, you can safely use 0.05inch or other whole divisions, but as you get smaller it is trickier to attach the wire to a pin.