Field Effect Tansistors - info?

Hey guys I'm new to the forum. I'm from Greece and as the nickname implies I'm studying automation engineering in Greece. The school has a whole lot of electronics and while I have actually passed the exams on the related subjects I found out that I actually do not know a lot about electronics, not because I can't remember what I studied but because it was not taught properly. Well anyway to get to the point, at some point we were taught about JFET amplifiers but I cannot actually recall being taught how FET's work. I was wondering if anyone could help me with that.

Thanks a lot.

Simplistic view: A three terminal (gate, source, drain) device where voltage applied gate-source controls current that flows drain-source. High input impedance, so almost no gate current flows. Down load some JFET and NFET data sheets from the manufacture's web sites and study them.

Thanks a lot mate!

JFETs have a diode type input gate and are normally on with zero gate-source voltage. The gate is reverse biased to turn the transistor off.

MOSFETS have an insulated gate and are normally off (with few exceptions) with zero gate-source voltage. The gate is forward biased to turn the transistor on.

AutomationEngineer said:

The school has a whole lot of electronics and while I have actually passed the exams on the related subjects I found out that I actually do not know a lot about electronics, not because I can't remember what I studied but because it was not taught properly.

Click to expand...

We have the same problem here in the 'States. I learned far more by sitting in the basement with a hot soldering iron and a pile of parts than I ever learned sitting in some classroom.

Well anyway to get to the point, at some point we were taught about JFET amplifiers but I cannot actually recall being taught how FET's work. I was wondering if anyone could help me with that.

Click to expand...

Design Equations:

Id= Idss(1 - Vgs / Vp)^2

Gm= (2 / Vp)[sqrt(Id * Idss)]

Where:

Id: Operating drain current

Idss: Saturation drain current with the gate and source shorted together

Vp: Pinch-off gate voltage

It is necessary to keep in mind that pinch-off voltage, since a JFET won't swing Vds below Vp without clipping and going nonlinear.

This is a depleation device that requires gate bias to turn it off, as opposed to BJTs and a lot of power MOSFETS, both of which are naturally "off", and require gate bias to turn them on.

As for how it works, an N-Channel JFET has a channel consisting of a bar of N-type silicon. The source and drain are connected to opposite ends. The gate is a diffusion of P-type surrounding a small section of the N-type channel to form a PN junction. Reverse biasing that junction pushes its depleation layer into the channel, increasing its resistance, and choking off current. The reverse biased PN junction gives the characteristic Hi-Z input, and the very small gate leakage current. In normal operation, the gate junction must always be reverse biased. If forward biased, it behaves like a normal diode, and amplification ceases.

The other characteristic is that most small signal JFETs don't have nearly the amplification of BJTs. The 2N3819 manages a u= 50 (small signal vacuum tube triode territory). On the upside, they don't produce nearly the same amount of distortion as BJTs.

Thank you very much! Time to study.