filter for load cell responce

Status
Not open for further replies.
E

Eng.Abbasi

New Member
hi all
im working on application for load cell , and i have a problem which is the response of the load cell after amplification when i put a constant weight ther response is as in the picture .
any one help me plz i'll be grateful
yours ,
abbasi9999
 
Eng.Abbasi said:
sorry i forgot to attach
Click to expand...
It looks like power supply ripple. What is the frequency of the ripple? Are you using a voltage regulator? If so, does it have adequate headroom? You should concentrate on keeping the interference from getting onto your signal in the first place. After that, you can worry about post-filtering.
It would help if you could post a schematic.
 
THNX for reply,
im using 2-voltage regulaters +/- , but as i know that headroom used to make the regulator in the operating point , so does it have to do with the ripple
thx
 
Last edited:
hi,
I see you are using a dual power supply.

How is your load cell bridge connected to these supplies also are you using a single ended or differential amplifier ? , what level of gain.
I expect the load cell is rated at about 10mV for full load.

Obvious question, have you correctly connected the screens from the load cell.

As Ron says, it looks very much like a power supply ripple problem.

Like to help.

Regards
EricG
 
There's no indication of frequency, could it be ripple introduced from digital logic using the same power supply? You're probably not decoupling your digital logic from the analog circuitry enough, can you show a photograph of the entire circuit?
 
thanks all

i hope i can attach my circuit but the problem that now i hadn't orcad program which i worked on it .
Other thing now im sure that the problem is from the power supply becuase when i use buttery instead of the TRANS. it doesnt give me that ripple , but there is another problem from the buttery which is the gain of the differential amplifier which i used will change (as the battery consumed ) so the weight will not be good
i used LPF using OPAMP LM358 to clear the ripple but its doesnt worked, if only i can know what is the frequency of the ripple or are there any device to remove it
thanks for all
 
You really need to describe the entire circuit in more detail. The regulators should take care of ripple from a generic mains adapter as long as you're using properly valued capacitors.
I'm no expert on scope signals but that ripple isn't symmetric. It looks like a fast rise and a slower fall, the kind of ripple you see on a switch mode power supply, are you using a switch mode supply? If so using a generic wallwart might get rid of the ripple as linear regulators handle the 120hz ripple fairly well.
 
Ripple from a mains rectifier is not symmetrical. It looks exactly like the picture he posted. I agree that we need a schematic - especially with his poor English (not a criticism, Abbasi, just a fact. You speak English better than I speak your language).
 
Just dawned on me after you said that Ron that the filter cap is probably what makes the ripple show a fast rise and a slow fall like that, the difference in rise and fall time is due to the input/output impedance?

The amplifier must be set to a really high level of gain to show filtered and regulated ripple like that. It might help if we knew how fast this signal was being sampled at as you could simple use larger and larger bypass caps on the opamp and the power supply until the ripple is low enough, it will slow the signal response though.
 
finally i was able te get orcad
and this is the schematic of my circuit
you can see this site
**broken link removed**
 

Attachments

  • orcad.GIF
    47.3 KB · Views: 3,976
hi,
Looked at the drawing, noticed the following points.

Unless you are using low voltage regulators, the +10v and -7v regs do have an high enough voltage drop. [the symbol for the -7bty is reversed]

There are no 0.1uF caps near to the volt regs, this can cause instabilty.

No load cell screen/shield is shown, connected to which point.

The ground points shown on the drawing do not indicate where the grounding points on the actual layout,
grounding termination is critical when using low level load cell bridges.

No frequency 'roll off' caps in the opa's, it will amplify any electrical noise the bridge circuits pickup.

No decoupling caps shown for the amplifiers.

If the first 'noise wave forms ' you posted were generated by this circuit, its possible that the +10v Vreg was 'hunting' due to insufficient input voltage. [what type of batteries are you using?]

I am currently using a load cell of the same type on a cattle weigh scale project.

Whats the maximum weight and resolution you are designing for ?.

Regards
EricG
 
Last edited:
Yeah, I think that one or more regulators (probably the +10V) are passing rectifier ripple to the output due to insufficient headroom.

[the symbol for the -7bty is reversed]
Click to expand...
Not really, because he labeled it as a negative voltage.

However, the inputs are swapped on the output op amp.

If the bridge is balanced, and the op amp resistors are perfectly matched, and the op amps are ideal, then ripple on the +10V supply will not get through to the output. If the bridge is unbalanced (which it will be, if it is to be useful), then ripple will get through. It will be worse if the resistors in the instrumentation amp are not perfectly matched (there are really only 3 pairs that have to be matched to optimize common mode rejection - they do not all have to be matched to each other).
 
Last edited:
hi Ron,

It shows the complete system is battery powered, no apparent Vac/rect?.
Thats why I suspect something amiss with his Vregs.

I see he's put the polarity symbol the -V ok, [its the symbol thats wrong].

I wasn't referring to common mode noise, as you say, it should be unity, its the diff noise I'm concerned about, cant see how/if any screens connected.

Eng:
if you are reading the thread, I would recommend you look at the AD7705 dual 16bit ADC, its got a PGA 1 thru 128, differential input, single power rail, SPI style I/F, ratiometric ADC. [ use the 2nd ADC as temperature comp if needed]

What are you weighing.?

EricG

edit:

RonH,
the battery symbol is normally drawn with short bar representing the neg end.
 
Last edited:
It may be battery-powered, or maybe he just used batteries as symbols for power supplies.
Eric, I still don't get what you mean about the -7V battery symbol - not that it's a big deal.
 
cellphone infrared

Is there someone in this forum already used cellphone infrared from their project? got some problem here, Does it uses 40khz on transmit IR? and uses 40khz on receive? or it is plain Infrared beam, coz i read the data sheet it does not says there.
 
dhongskie, it's customary to start your own post if you have a question, not hijack someone else's. Most cell phones use IRDA which doesn't have a carrier, it's just straight up serial data sent directly to the xmitter. Look up the IRDA protocol. It starts out at a standard baud rate and then negotiates for higher ones. The protocol specs are available on the net.
 
thnx all
first i use Vac/rect ,second i connt use AD7705 becuase we dont have it in gaza , but im really think that the problem is from the -regulator becuase when i put about -9v it output -6v and if i put less than -|7|v it output as -4 its not giving me -5v exactly

another thing is wrong that i put at the input and the output of the regulator 10u not 2.2u & 1u , another thing what is mean by "Low input offset voltage" to an opamp , and i search in the datasheet and i cannot find input but as i know it 330 as i put it between the IA .

thanx all very much
i hope to answer especially "Low input offset voltage"
 
hi,
i hope to answer especially "Low input offset voltage"

Most times when you build a opa circuit you will find that even with perfectly
balanced resistors and 0.00v input signal the opa output will not be 0.00v.

This can be due to the input offset error of the opa itself, during manufacture its not realistic to manufacture
the opa input stage to have 0.000v [zero] balance.

If you chose a good quality opa, this offset voltage will be very small.

However, if the opa output must be zero when the input 'signal' is zero, then its necessary to feed an external dc voltage into the summing junction of the opa that cancels the 'internal offset voltage', so you get zero out from the opa with a zero signal on the input.

Some opa's have two pins, to which you can connect an external variable resistor and 'adjust out' the offset.

Its important that the external dc voltage is stable.

Let me know if you understand.

EricG
 
Last edited:

thnx for answering
so can i say the source of the noise which i have is this small Volt level
and where is the summing junction, Is it pin on the OPAMP it self or i have to build summing amplifier

abbasi9999
 
Status
Not open for further replies.

Similar threads

  • Question
What is the drop in load voltage and output voltage of the power supply during loading؟
Replies
10
Views
2K
crutschow
S
  • Question
Modeling Microcontroller Load
Replies
7
Views
2K
ZipZapOuch
  • Question
NEW INFO! Electrostatic Air Filter Using Neon Transformer?
Replies
4
Views
2K
rjenkinsgb
D
  • Solved
Reed contact for disk position
2
Replies
32
Views
4K
Dr.Dree
D
transistor load calculation help
2
Replies
34
Views
5K
Pommie
P
Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…