FPGA LED Help w/ Verilog

[wuchy143]

Hello All,

I'm a noob to FPGA's and have been able to take some code load it into the Platform flash on my Spartan 3 dev board and see LED's turn on. I would like to try and flash one of the LED's but cannot figure out how to do it. Can anyone help? I just want one of the LED's to blink on and off at a visible frequency to a human.

My code thus far:

module exp1 (SW, LED);
input <3:0> SW;
output <7:0> LED;

assign LED<0> = 1'b1; // turns on LEDs 0 and 1
assign LED<1> = 1'b1;

assign LED<2> = SW<0>; // assigns the input SW<0> <1> to the LEDs 2 and 3. Whatever that input is.
assign LED<3> = SW<1>;

endmodule

 

[Wade Hassler]

Hello All,

I'm a noob to FPGA's and have been able to take some code load it into the Platform flash on my Spartan 3 dev board and see LED's turn on. I would like to try and flash one of the LED's but cannot figure out how to do it. Can anyone help? I just want one of the LED's to blink on and off at a visible frequency to a human.

My code thus far:

module exp1 (SW, LED);
input <3:0> SW;
output <7:0> LED;

assign LED<0> = 1'b1; // turns on LEDs 0 and 1
assign LED<1> = 1'b1;

assign LED<2> = SW<0>; // assigns the input SW<0> <1> to the LEDs 2 and 3. Whatever that input is.
assign LED<3> = SW<1>;

endmodule

Take a look at
fpga4fun.com - LED glow
You should bookmark that site.

 

[wuchy143]

Hi Wade thanks for the response.

I have taken a look at that site and the one I'm trying to do is turn the LED on and off at some frequency. I encorporated what they have for blinking the LED on and off but this does not make the LED blink. I don't have a scope or I could verify if it's actually blinking but so fast I can't see it. Perhaps that's where I'm going wrong....I"m confused...but will take another look at it tonight. My code is below. I'm able to load it into the FPGA but the LED appears to be off all the time. Maybe I'm not defining clk correctly?

module LEDblink(clk, LED, SW);
input clk;
input [3:0] SW;
output [7:0] LED;

reg[32:0] cnt;
always @(posedge clk) cnt<=cnt+1;

assign LED[0] = cnt[22];
assign LED[1] = SW[0];
assign LED[2] = SW[1];
assign LED[3] = SW[2];
assign LED[4] = SW[3];
assign LED[5] = SW[0];
assign LED[6] = SW[0];
assign LED[7] = SW[0];

endmodule

 

[Wade Hassler]

Hi Wade thanks for the response.

I have taken a look at that site and the one I'm trying to do is turn the LED on and off at some frequency. I encorporated what they have for blinking the LED on and off but this does not make the LED blink. I don't have a scope or I could verify if it's actually blinking but so fast I can't see it. Perhaps that's where I'm going wrong....I"m confused...but will take another look at it tonight. My code is below. I'm able to load it into the FPGA but the LED appears to be off all the time. Maybe I'm not defining clk correctly?

module LEDblink(clk, LED, SW);
input clk;
input [3:0] SW;
output [7:0] LED;

reg[32:0] cnt;
always @(posedge clk) cnt<=cnt+1;

assign LED[0] = cnt[22];
assign LED[1] = SW[0];
assign LED[2] = SW[1];
assign LED[3] = SW[2];
assign LED[4] = SW[3];
assign LED[5] = SW[0];
assign LED[6] = SW[0];
assign LED[7] = SW[0];

endmodule

What is your clock-frequency? I don't know any details about the Xilinx board, but most FPGA dev-boards have one or more 10-50MHz clock inputs to one or more of several clock-inputs.
You have to find the correct pin and define it as the clock-input.

 

[BrownOut]

If you want to flash every second or so, you'll have to created a 23- 25 bit counter:

reg [24:0] counter:

assign LED[0] <= counter[24];

always @(posedge clock) begin
counter <= counter + 1;
end

etc.

 

[wuchy143]

So I understand the code from Brownout. But I'm a little confused as how to set the clock in verilog. I looked online on how to do it but nothing seems to make sense. Could anyone point me in the right direction on how to establish a clock in verilog code?

-mike

 

[wuchy143]

Thanks for replies!!

 

[BrownOut]

You don't set the clock on verillog. Your Spartan board comes with a 50Mhz onboard clock, which needs to be divided for a reasonable frequency. Actually, my 24-bit counter was calculated for a 5Mhz clock (DUH!) For the 50Mhz, you're gonna need at least 26 bits. Be sure to set the location of the clock pin in Plan Ahead, or whatever pin constraints editor you are using. Look in your users manual for the pin location, or else look in the .UCF file of an example design for the correct clock pin.

 

[wuchy143]

I cannot get my LED to blink after much research. I"m using the UCF file which came from my board and I'm confident that's correct. Here is my code which is trying to blink LED[0]

module exp1(SW, LED, CLK_50M);
input [3:0] SW;
output [7:0] LED;
input CLK_50M;

reg [32:0] counter;
always @(posedge CLK_50M) begin
counter<=counter+1;
end

assign LED[0] = counter[3];
assign LED[1] = SW[1];

endmodule

 

[BrownOut]

Post your .UCF file. Also, use assign LED[0] = counter[32] Using counter[3] will flash too fast to see.

 

[wuchy143]

to be honest I don't completely understand why a 3 would blink too fast. Though I think this is because I'm still struggling with the language. So we have a register which is 33 bits long. Exactly how is the register used to blink the LED. Sorry if this is a painfully easy question.

NET "LED<0>" LOC = "R20" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "LED<1>" LOC = "T19" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "LED<2>" LOC = "U20" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "LED<3>" LOC = "U19" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "LED<4>" LOC = "V19" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "LED<5>" LOC = "V20" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "LED<6>" LOC = "Y22" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
NET "LED<7>" LOC = "W21" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;

NET "CLK_50M" LOC = "E12" | IOSTANDARD = LVCMOS33 | PERIOD = 20.000 ;
OFFSET = IN 10.000 VALID 20.000 BEFORE "CLK_50M" ;
OFFSET = OUT 20.000 AFTER "CLK_50M" ;

NET "SW<0>" LOC = "V8" | IOSTANDARD = LVCMOS33 ;
NET "SW<1>" LOC = "U10" | IOSTANDARD = LVCMOS33 ;
NET "SW<2>" LOC = "U8" | IOSTANDARD = LVCMOS33 ;
NET "SW<3>" LOC = "T9" | IOSTANDARD = LVCMOS33 ;

 

[BrownOut]

I edited your code just to simplify it a little, and ran it on my Spartan 1600E board, and the LED0 flashed at about 1 per second. Here is the code:

module exp1(SW, LED, CLK_50M);
input SW;
output [1:0] LED;
input CLK_50M;

wire [1:0] LED;
reg [26:0] counter;
always @(posedge CLK_50M) begin
counter<=counter+1;
end

assign LED[0] = counter[26];
assign LED[1] = SW;

endmodule

While you look at this, I'll look at your UCF code.

 

[wuchy143]

fair enough

 

[BrownOut]

Please tell me exactly what development board you have. Your UCF's don't correlate to anything I"m using. Try my code too. The reason bit would be too fast comes from the nature of counters. Remember, each bit of the counter will transition at Clock/2^N, where N is the bit position. So, for blinking at 1 second, you need N~=26 if the clock is 50MHZ. IE 2^26 ~67MEG.

 

[wuchy143]

**broken link removed**

 

[BrownOut]

Your UCF looks OK, except for the switches. The Spartan3AN Users Manual has the East, North, South, West switches at T16, T14, T15 & U15 respectively. Try my code and cut your UCF file down to just the clock, two diodes and one swtich. If that doesn't work, then I'm not sure what else to check.

 

[BrownOut]

Just thought of something else; make sure your UCF's are getting applied to the project. Open your project, look at the summary report. Choose "IOB Properties" and make sure the signals are locked to the correct pins.

 

[wuchy143]

I will be taking a look at this again today at some point. Gotta do real work first Though I did want to mention one piece of information. I can get all the way up to place and route using my ISE but it fails the place and route with an error stating, "AT least one timing constraint is impossible to meet because component delays alone exceed the constraint." It then gives me a table showing me what failed which is the "OFFSET" constraint. Not sure if this helps but it appears this may be a good piece of information.

 

[BrownOut]

I think you can safely remove the "offset" constraint. Here is the constraint file I used. Note here that your switches needs pulldowns, as in my switch constraints. If you use my UCF file, make sure you change the pin locations, as I am using a different board than you are.

NET "CLK_50M" PERIOD = 20.0ns HIGH 50%;
NET "CLK_50M" LOC = C9 | IOSTANDARD = LVTTL;
NET "LED[0]" LOC = D4 | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "LED[1]" LOC = C3 | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "SW" LOC = V16 | iostandard = LVTTL | pulldown;

 

[wuchy143]

sweet! so i made my constraints bigger and now I am able to program my platform flash and get the LED to blink!! Not sure if I should be so excited to make an LED.....blink but I'll take what I can get. It looks like I need to understand the UCF contraints with regards to clock better.

Thx a bunch. I really appreciate the help. This FPGA stuff is really cool. I wish I got into it my sr year in EE but I guess better late than never.

-mike