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GPIO question

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andy257

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Hi All,

I have a single board computer that outputs 3.3V on its GPIO port. The trouble is that a couple of the pins on the GPIO port are actually 5V and GND. My understanding was that the I/O would then be 5V/GNd logic not 3.3V. Does anyone have any ideas why this is?

When i measure from output to ground its 3.3V, but if i measure output to 5V i see 1.7V, why is this?

Thanks
 
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Assuming this is a CMOS circuit, you either have a separate 3.3 v supply for I/O or there is excessive load on I/O.

CMOS driver with light output loading will be very close to supply rail.

Are you sure some of these I/O are not programmed as inputs? All inputs need to be driven low or high so they don't float. Holding a CMOS gate in middle of supply range will cause both P-ch and N-ch output MOSFET's to draw current causing excessive current drain.
 
With no load connected to the I/O i measure 3.3V output. There are separate pins for input and separate pins for output so i am assuming they dont need to be configured as input or output.

I just assumed because the the two most right hand pins on the header are 5v / GNd on the GPIO port??
 
It might be 3.3v logic with 5v tolerant inputs. It is hard to say without knowing the device you are talking about.
 
Why do you think it should be 5v? Just because board takes a 5v supply?

Most processors today are smaller geometry that can not tolerate 5vdc. I bet the board has a 3.3 v regulator.

90 nanometer parts have dual oxide options. Single oxide core processor runs at 1.3 vdc and I/O (having dual oxide layer gates) can tolerate up to about 3.5 vdc.

Most Intel parts over last year are 45 nm geometry. Core processor runs at 0.9vdc, I/O at 3.3vdc.
 
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