Half Bridge / Sync Buck Driver Questions

Hi,

I'm reading up on several driver designs which could simplify my application. Originally I'd created a sync buck design via a PIC driving two FET's (high/low). Unfortunately I forgot I'd need some method of detecting current flow through the inductor to ensure the load (which is capacitive) wasn't discharging. I'm working with up to 100V hence why I haven't gone integrated.

One chip that has caught my eye is the MIC4102. It specifically states in the documentation that it'll detect when HS is positive to GND and prevent LO from switching on. Is this is the case with all half bridge drivers?



The reason I ask is the IRS2008 is much cheaper (< 1/4 the price). I'm wondering why, such as whether the IRS2008 is much slower which makes it less suitable for a buck.



Final question, would two of these (aka a full bridge rectifier) give active rectification? That is, can the load be AC and positive/negative to Vs, or is Vs always floating? (If it is I don't know how it monitors it relative to ground).

Thanks,

Andrew

In the MIC4102, there is a pin "LS" what disables the low MOSFET and not the top MOSFET. (the bottom transistor will look like a diode)
In the IRS2008 the /SD pin will disable both MOSFETS.

ACharnley said:

Final question, would two of these (aka a full bridge rectifier) give active rectification? That is, can the load be AC and positive/negative to Vs, or is Vs always floating? (If it is I don't know how it monitors it relative to ground).

Click to expand...

Do not understand. Please draw a picture.

Yup, but what I'm needing to understand is whether all these half bridge drivers have circuitry to prevent backflow through the lower FET.

So if I do a low duty cycle of 5%, where the bottom fet would be on 95%, the driver recognises there's a positive voltage between the FET's and prevents the lower FET from turning on.

ACharnley said:

whether all these half bridge drivers have circuitry to prevent backflow through the lower FET.

Click to expand...

No, this is unique to that part.
Most drivers will draw down the charge of the output capacitor if the duty cycle is very low.
The MIC4102 will also pull the capacitor down if the LS pin is wrong.

Hmm, so how to know when to disable LO (override the duty) without knowing which way current is flowing through the inductor?

I can turn LI off so that LO is just a diode but it's knowing when to do it. I have a large super cap on the output and sticking that through the lower FET will blow it.

After reading up I've learned I can calculate the min duty based on the inductor ripple value.

You can see my original circuit below. It's similar to the ones above but without the floating high driver (instead I'm using a 18V boost output).

If I were to stick with this would the 18V always be enough to saturate the FET? I'm thinking what'll actually happen is the loop through L50 & output will make the drive too slow.

The tc4427 is designed to drive two MOSFETs with their Source connected to ground. It is not to drive a top side transistor.
Also there is no logic to stop having both transistors turned on at the same time.
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ACharnley said:

After reading up I've learned I can calculate the min duty based on the inductor ripple value.

Click to expand...

If you measure the 100 volt supply then multiply by duty cycle you get a voltage. Measure the capacitors voltage. If the capacitor voltage is much high then the 100 * ds then you have this problem. (probably only happens at start up and if the capacitor has no load to pull it down)

The shoot-through was to be handled by the PIC (built in to many now).

Yep, another day another cock-up!

ACharnley said:

another day another cock-up!

Click to expand...

Keep it to only one a day! lol

NA

So back to square one,

When a buck transitions to DCM mode potentially current can flow from the output through the sync FET, therefore the FET must turn into an ideal diode, or be turned off until CCM restarts.

I haven't found a controller smart enough to do this, they all seem to assume the load has no real capacitance. The MIC4605 is one I've been using and which doesn't. Previously I was controlling the workflow in software where I could enable the lower FET by duty cycle, but now it's under MCU control. Unless I can find a 100v rated controller which offers this function would you agree I'd be better off with a single floating high side driver and an independent comparator style controller for the lower FET?

If I were to use a comparator is there such a device that will work with negative input being ground? Devices like the LM319 I read require about 2v above/below the rails to work correctly which also means I need a reference. Finally, if in this application I'm potentially switching 100v, and I'm detecting let's say 0.1v above ground, invariable I'll have to protect the input (resistor/zener)?

As you can tell I'm all over the place wondering how best to resolve it.

I know that your input voltage is 100, but what is your capacitor voltage? Yes, it will start at zero, and at low voltage is where synchronous rectification is a big advantage, but after you get up past 8-10 volts output the advantage starts to shrink.

Is the difficulty of achieving synchronous rectification worth the effort? What is the charge current and what would the losses in the freewheeling diode be if you go with a conventional low side rectifier?

It's 5.25v max and current is fairly limited. Not long after posting I learned comparators can have rail-to-rail input (I knew it expected for output).

My understanding is once the lower FET becomes an ideal diode it covers all cases, you don't need an inverted+deadtime pwm source to drive it. The only consideration I can think off is comparator switch time which probably won't be as quick.