help for for/loop statements in vhdl

hello, i am doing a project in vhdl. i need to perform a action similar to accept a matrix ' m x n ' where m value ranges between 1 and 32 it is obtained by reading a bit pattern. n value ranges between 1 and 16 obtained from another signal. for every (m,n) i need to do some operation. please help me on this... it is as illustrated below.

m <---- range 1 to 32 dependin on signal1

m = 1 when signal1 = "000"
m = 2 when signal1 = "001"
.
.
.
.
.
m=32 when signal1 = "some pattern"

n <----range 1 to 16

n=1 when signal2 = "0000"
n=2 when signal2 = "0001"
.
.
.
.
n=16 when signal2 = "1111"

-- now i need do the follwing

for(i=1; i<= m ; i++)
{
for(j=1; j<n; j++)
{
some assign statement such as a <= b;
}
}

-- how can i implement this in vhdl


please help me....
thanking you...

with regards....

anybody plz help on this....

thanxx