Help-LMX2306/2316/2326-PLL with PIC 16F877A

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bjox1

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Dear all,

I have been working on PIC16F877A and LMX2306. My task is to lock the VCO frequency to 110MHz. I have designed the PLL circuit as described in LMX2306 datasheet. I have also attached my complete circuit.

I am using assembly language to program my PIC. I have also written a code based on bit-bang method. The problem is when I am sending the data bits to the PLL chip it does not lock the VCO frequency to 110MHz rather it fluctuates between 99-100 MHz all the time . The loop filter values were calculated from the national semicondor's tool 'EasyPLL'.

I will be really grateful if anyone could help me on this.

I have attached the code with this post and it does the following things:

PIC:
PORTB,1 - DATA line
PORTB,2 - LE line
PORTB,3 - Clock line.
PIC is running on 4MHz crystal

PLL:
-CE pin of PLL [pin 10] is connected to 5V
-Fo/LD[lock detect is set for active HIGH] and is connected to PORTC,1 of
the PIC as input from the PLL.
-PLL is running on 4MHz crystal [as reference freq]

VCO:
range: 100-200MHz

Code:
; For  LMX2306
; VCO Frequency is 110 MHz
; R Counter = 4MHz/1MHz =4  
; N Counter = 110MHz/1MHz= 110
; Comparison frequency Fcomp is 1MHz
; B counter value is [for N=110] is 110/8=13 and A counter value is 110/8 : remainder= 6
;*********************************************************************

;(RB1) high        DATA HI
;(RB2) high        LE HI
;(RB3) high        CLK HI
;------------------------------------------------------------------------
;
   list p=16f877a      ;list directive to define processor
      #include <p16f877a.inc>   ;processor specific definitions
      errorlevel -302      ;suppress "not in bank 0" message

   __config _LVP_OFF & _XT_OSC & _WDT_OFF & _PWRTE_ON & _CP_OFF & _BODEN_OFF & _DEBUG_OFF




  cblock   0x20
   ncount           ; for delaying data being sent to the LM2306
   mcount           ; for delaying more      ;
   reg_h            ; High bits of 21bit register
   reg_m             ; Mid bits of 21bit register
   reg_l            ; Low bits of 21bit register
         
   endc
                       
;
   org     0x00
   goto   start
 
start    org      0x010            ; POWER_ON Reset (Beginning of program)
      CLRF   mcount          
      clrf   ncount
      clrf   reg_h
      clrf   reg_m
      clrf   reg_l
      clrf   PORTB
      clrf   PORTC
        bsf     STATUS,RP0      ;bank 1
        bcf     STATUS,RP1
        movlw   b'00000000'
        movwf   TRISB           ;portb [7-0] outputs
   movlw   b'00000010'
        movwf   TRISC          ;**set pin 1 as lock detect input
   bcf      STATUS,RP0      ;bank0   
   

;***** make enable high**************
      bsf      PORTB,2
      nop
      nop
           call    wait         ; Wait a short while
      bcf      PORTB,2   
loadlmx
        nop
        nop
;
;
        movlw   0x00            ; load low bits
        movwf   PORTB            ; make all output bits low
;
; Load the 21 bit F register C1,C2 = 1,1
; MSB first
;
   clrf   reg_h
   clrf   reg_m
   clrf   reg_l
   movlw   0x00         ; Load reg_h with f_high
   movwf   reg_h         ;
   movlw   0x00         ; Load reg_m with f_mid
   movwf   reg_m         ;
   movlw   0xB3         ; Load reg_l with f_low
   movwf   reg_l         ;
   call sendreg         ; Send data to LMX
;
; Load the 21 bit R register C1,C2 = 0,0
; MSB first
;
   clrf   reg_h
   clrf   reg_m
   clrf   reg_l
   movlw   0x00         ; Load reg_h with r_high
   movwf   reg_h         ;
   movlw   0x00         ; Load reg_m with r_mid
   movwf   reg_m         ;
   movlw   b'00010000'      ; Load reg_l with r_low
   movwf   reg_l         ;
   call sendreg         ; Send data to LMX
;
; Load the 21 bit N register C1,C2 = 1,0;
; MSB first
;
   clrf   reg_h
   clrf   reg_m
   clrf   reg_l
   movlw   b'00010000'      ; Load reg_h with n_high
   movwf   reg_h         ;
   movlw   b'00000110'      ; Load reg_m with n_mid
   movwf   reg_m         ;
   movlw   b'10011001'      ; Load reg_l with n_low
   movwf   reg_l         ;
   call sendreg         ; Send data to LMX
;
checklock
   call wait                  ; Wait a short while
   btfsc PORTC,1         ; Locked?
   goto checklock         ; Yes, continue loop
   goto loadlmx         ; No, try again

; Wait a while
;
; time = (((ncount * 3 + 2) * mcount) * ocount) microseconds, max 50 seconds
wait
       movlw   0x31      ; set w = 50 decimal (max ff)
        movwf   mcount         ; mcount = w
loadN   movlw   0x31         ; set w = 50 decimal (max ff)
        movwf   ncount         ; ncount = w
decN    decfsz  ncount, f         ; decrement ncount by 1
        goto    decN         ; if ncount not 0 then decrement again
        decfsz  mcount, f         ; else decrement mcount by 1
        goto    loadN         ; if mcount not 0 then reload ncount
       return                     ;


; Load the 21 bit register
;
sendreg
   btfss reg_h,4   ; Bit 21
   call    zero   ; 0
   btfsc reg_h,4   ;
   call    one      ; 1
   btfss reg_h,3   ; Bit 20
   call    zero   ; 0
   btfsc reg_h,3   ;
   call    one      ; 1
   btfss reg_h,2   ; Bit 19
   call    zero   ; 0
   btfsc reg_h,2   ;
   call    one      ; 1
   btfss reg_h,1   ; Bit 18
   call    zero   ; 0
   btfsc reg_h,1   ;
   call    one      ; 1
   btfss reg_h,0   ; Bit 17
   call    zero   ; 0
   btfsc reg_h,0   ;
   call    one      ; 1
   btfss reg_m,7   ; Bit 16
   call    zero   ; 0
   btfsc reg_m,7   ;
   call    one      ; 1
   btfss reg_m,6   ; Bit 15
   call    zero   ; 0
   btfsc reg_m,6   ;
   call    one      ; 1
   btfss reg_m,5   ; Bit 14
   call    zero   ; 0
   btfsc reg_m,5   ;
   call    one      ; 1
   btfss reg_m,4   ; Bit 13
   call    zero   ; 0
   btfsc reg_m,4   ;
   call    one      ; 1
   btfss reg_m,3   ; Bit 12
   call    zero   ; 0
   btfsc reg_m,3   ;
   call    one      ; 1
   btfss reg_m,2   ; Bit 11
   call    zero   ; 0
   btfsc reg_m,2   ;
   call    one      ; 1
   btfss reg_m,1   ; Bit 10
   call    zero   ; 0
   btfsc reg_m,1   ;
   call    one      ; 1
   btfss reg_m,0   ; Bit 9
   call    zero   ; 0
   btfsc reg_m,0   ;
   call    one      ; 1
   btfss reg_l,7   ; Bit 8
   call    zero   ; 0
   btfsc reg_l,7   ;
   call    one      ; 1
   btfss reg_l,6   ; Bit 7
   call    zero   ; 0
   btfsc reg_l,6   ;
   call    one      ; 1
   btfss reg_l,5   ; Bit 6
   call    zero   ; 0
   btfsc reg_l,5   ;
   call    one      ; 1
   btfss reg_l,4   ; Bit 5
   call    zero   ; 0
   btfsc reg_l,4   ;
   call    one      ; 1
   btfss reg_l,3   ; Bit 4
   call    zero   ; 0
   btfsc reg_l,3   ;
   call    one      ; 1
   btfss reg_l,2   ; Bit 3
   call    zero   ; 0
   btfsc reg_l,2   ;
   call    one      ; 1
   btfss reg_l,1   ; Bit 2
   call    zero   ; 0
   btfsc reg_l,1   ;
   call    one      ; 1
   btfss reg_l,0   ; Bit 1
   call    zero   ; 0
   btfsc reg_l,0   ;
   call    one      ; 1


;*******make enable high to enter all C data****
   bsf      PORTB,2
   bcf      PORTB,2
   return

;
; Subroutines to send 0 and 1
;                                                                           
zero
   
      BCF    PORTB,1      ; Load 0 on data line
      nop
      BSF    PORTB,3      ; Clock high
      BCF    PORTB,3      ; Clock Low
      RETURN
;
one   
      
      BSF    PORTB,1      ; Load 1 on data line
      nop
      nop
      BSF    PORTB,3      ; Clock high
      BCF    PORTB,3      ; Clock Low
      RETURN
;
      end
 

Attachments

  • PLL.jpg
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Last edited:
I plan to play with LMX2326 connected to a PIC as well but I am still waiting to receive those breakout boards ..... once I have them I'll check it

Petr
 
Thanks Petr for your reply.

PS: Could anyone scan through my whole process? I would greatly appreciate that.
 
Does anyone have any idea on this??
Please help me as I'm getting frustrated by seeing the same result every passing hour.

Thanks in advance.
 
Don't make your life difficult.

Do this:

1. Send the register data to the LMX PLL just once, and have the PIC waits in an infinite loop. No point sending the same data to the LMX if it doesn't lock.

2. Monitor the frequency output. Does it fluctuate between 90~100MHz?

3. If so, hardware problem. It is either the loop filter or the VCO itself. Have you determine the full frequency range of the VCO by driving it with a constant voltage?
 
Maybe a few suggestions what to try:
1. double-check the wiring (swapped signals etc)
2. if you have a logic analyzer, try to connect it the LE,CLK,DATA signals and compare what you see with the datasheet.
3. if you don't have a llogic analyzer try running the simulator which includes logic analyzer.
3. try use a debugger (e.g. Pickit-2) to single-step through the code.
4. if you are sure the protocol is correct try to swith to some test mode e.g. send prescaler output to Fo/LD and check it succeeds.

Petr
 
kchriste said:
Have a look at this site if you haven't already:
https://hem.passagen.se/communication/fm_500.html
Maybe try the loop filter type/values that he uses instead.

Thank you kchriste for your valuable advise. I had a look at the website and it contains very helpful informations.

It has .HEX file of the code and I was wondering if it is at all possible to download a HEX file to my PIC?

I am using MPLAB IDE 8.01 V [ICD2]. I would be grateful if you could advise me on this.

Many thanks.
 


You simply select FILE/IMPORT and select your hex file.
 
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