This word is mapped in program memory location 2007h. This address is beyond the user program memory space. This word can be accessed only during programming.
The following system requirements of PIC can be designated by the configuration word.
View attachment 66368
CP1,CP0 : Flash Program Memory Code Protection Bits.
All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.
11 : Code protection off
10 : 1F00h to 1FFFh code protected
01 : 1000h to 1FFFh code protected
00 : 0000h to 1FFFh code protected
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DEBUG : In-Circuit Debugger Mode
1 : In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
0 : In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
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WRT : Flash Program Memory Write Enable
1 : Unprotected program memory may be written to by EECON control
0 : Unprotected program memory may not be written to by EECON control
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CPD : Data EEPROM memory Code Protection
1 : Code protection off
0 : Data EEPROM memory code protected
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LVP : Low Voltage In-Circuit Serial Programming Enable bit
1 : RB3/PGM pin has PGM function, low voltage programming enabled
The high voltage programming mode is always available, regardless of the state of the LVP bit.
0 : RB3 is digital I/O, High Voltage on MCLR must be used for programming
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BODEN : Brown-out Reset Enable bit
1 : BOR enabled
0 : BOR disabled
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PWRTE : Power-up Timer Enable bit
1 : PWRT disabled
0 : PWRT enabled
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WDTE : Watchdog Timer Enable bit
1 : WDT enabled
0 : WDT disabled
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FOSC1,FOSC0 : Oscillator Selection bits
11 : RC : Resistor/Capacitor oscillator ( Less than 1MHz )
10 : HS : High Speed Crystal/Resonator oscillator ( 4MHz to 20MHz )
01 : XT : Crystal/Resonator oscillator ( Less than 4MHz )
00 : LP : Low Power Crystal oscillator ( Less than 200KHz )