Help to develop a PLL circuit to demodulate FM

[soumyadip]

I am trying to develop a PLL(Phase-locked loop) and want to use it to demodulate FM. But I am facing many problems.

1> I am not getting any practical circuit of PLL that can be implemented.

2> We then decided to implement the three components of PLL namely a)Multiplier, b)VCO and c)Low pass filter separately and then will combine them to form a PLL.

But again the problem is we are not getting any practical circuit of analog Multiplier that can be implemented in a PCB or breadboard.

second is we are not getting any idea how to implement the VCO with NE/SE566 chip.

pls help me if u can and give me an idea where i can find the tutorial where the mathematics is given so that we can carry it forward.

We are not developing any FM radio receiver, we are developing just a PLL to demodulate FM of low frequency. please help.

 

[Nigel Goodwin]

Here's a clue - the VCO is set to the carrier frequency of the signal, as the incoming frequency varies the control voltage to the VCO varies with it, to keep the loop locked. This control voltage is the de-modulated output.

 

[soumyadip]

thanks...after searching a lot in the internet I hav got a PDf file https://www.electro-tech-online.com/custompdfs/2008/01/AN-210.pdf

please see it and suggest whether it can help me or not.

And if anybody can suggest me any tutorial that has mathematical analysis with it, please suggest.

 

[RadioRon]

**broken link removed**


**broken link removed**

https://www.amazon.com/Phase-Locked-Loops-Applications-Professional-Engineering/dp/0071412018/ref=pd_bbs_sr_3?ie=UTF8&s=books&qid=1200963599&sr=1-3

https://www.amazon.com/Phase-Locked-Engineering-Handbook-Integrated-Circuits/dp/159693154X/ref=sr_1_4?ie=UTF8&s=books&qid=1200963599&sr=1-4

https://www.amazon.com/Equations-Phase-Locked-Loops-Scientific-Nonlinear/dp/9812770909/ref=sr_1_9?ie=UTF8&s=books&qid=1200963599&sr=1-9