I'm assuming that because no one reponded, my design looks fine? I went ahead and made a few more revisions.
For one thing, I decided that it would be nice if my device could calibrate itself, as if I make the user twiddle with dials and knobs to calibrate, he probably won't get the best results, and this is supposed to be a fairly precise peice of instrumentation. Looking around, I found some digital potentiometers by catalyst semiconductor, they apparently come in 10k 50k and 100k models. This seems like a great solution, am I correct in this? Also, it doesn't list what the taps are (it only says there are 100 of them). Should I assume they are in a linear configuration, and thus 100ohms per tap?
Here is the data sheet, if anyone can glean something from it that I have missed.
**broken link removed**
Also, is it ok to wire the two POT's for Rf as I've shown? I am assuming the 5113 is accurate enough that this will allow me to twiddle the frequency on my device.
So, for my new values:
f0 = 1 / (2 * pi * Rf * C)
Q = R1 / Rq
G = R1 / Rq
R = 10k (noncritical)
Rq = 5113 10k POT (normally set to 100 ohms)
Rg = 5113 10k POT (normally set to 5k)
Rf = 5113 10k POT (normally set to 4.2k)
C = 680pF
R1 = 5k
R = 10k
**broken link removed**
Additionally, for the processing of my signal (an analog voltage level), is it best to use the built in gain stage, a pre-filter gain stage, or a post-filter gain stage? Possibly a combination of the three?
Final question, I promise
How do I best select which chip to use for my op-amps?