Help with an ESC schematic

Hi everyone! I need help with the following:
I want to design an ESC (for a three-phase brushless motor) and I am looking at a schematic that does not explain the reason for the use of switching cells in parallel. ESCs often have 6 MOSFETs of the same type, but this one has 12, 4 per phase (2 P-type above and two N-type below), with the switching cells in parallel as shown in the image. Does anyone really know why it does this? The boy says "For greater safety and to reduce the effort of the components, two elementary cells are placed in parallel for each phase of the motor." The only thing I can think of is that you implement it to divide the current that each MOSFET has to support.
Thanks for any possible answers!

It will be to spread the current load and heat dissipation.

Note that the gate drive circuits in the diagram are not good for high speed and efficiency with high power FETs, though OK, for small ones.

Power MOSFETs have very high gate capacitance and need drivers capable of sourcing and sinking relatively high currents, often half an amp or more, to ensure the FETs spend as little time as possible in the half-on state where they dissipate a lot of power.

Thank you!! The thing is that I am doing my final year project at the university and I want to know if it would be appropriate to implement this circuit for a current of 30A (I know that to withstand that current, more powerful MOSFETs may be needed). I am attaching the final circuit with drivers on which we would base it, but what I don't know is if it would really be interesting to have those MOSFET cells in parallel or we could achieve it simply with one MOSFET cell per phase.

What is the number on those drivers? It looks like fan (or pan) something. It's a poor copy.

Mike.

Pommie said:

What is the number on those drivers? It looks like fan (or pan) something. It's a poor copy.

Mike.

Click to expand...

The drivers are FAN3268TMX. If not, which drivers and which MOSFET would you recommend me for a motor that consumes 30A maximum.

The driver ICs look very good, as long as the supply voltage is within their 18V limit.

I suggest adding the provision for a low value series resistor for gate current control; it can be linked if not needed, but adding one in with no space allowance is a lot harder!

Will you be using heatsinks for the output devices, or are you aiming for a surface mount assembly with only the PCB to dissipate heat? That's a deciding factor for the type and number of power devices.

Also, must you use that specific MCU? The 18F25K80 does not have a "Motor PWM" module and using a device with one would likely make the PWM output control rather simpler.

The Motor PWM modules include dual outputs per channel/phase with dead time control etc. included so they can easily control H Bridge power stages.

Have a look at the Microchip BDLC demo board; even if you don't get one, you can grab the documentations and demo source codes for open loop or encoder feedback motors to see what's involved and the type of phase control involved.

If you need a device with CAN as well, my favourite is the DSPIC33EP512MC502 (or the other memory size / pin count versions). That particular one has 512K flash and 48K RAM, so good for projects needing a lot of comms buffers or storage for graphics etc.

Well thanks to all but finally I´m using another circuit, can anyone help me with the schematic part of the BEMF voltage divider? Thanks. What do you think A0, A1, A2 and D6 are doing? I think that D6 detects when it´s a 0 crosing and A0, A1, A2 detect during all the time if they´re floating or if they are active phases. So then, knowing with phase is floating and knowing how the other two phases are, we can know wich is the next step sequence.

A0, A1 and A2 are measuring the back EMF from the motor windings to determine phase and speed. The motor will produce a voltage proportional to speed when the winding is not being driver.

I'm not sure what D6 is for, unless its another analog input to monitor phase balance, or as fault detect of some sort? It is seeing the sum of all three phases, which should average zero.
Or the designer may be trying to use the tristate / zero levels of the pin as a switch to change the divider ranges???

The sum of the voltages on the windings is not zero, but some other voltage D6 is used as a reference point so that you can see which phase crosses above this "zero", and that then decides which phase gets commutated.

Why not just consult the source code?, where it clearly explains that D6 is a comparator input to the ATMEGA328 - the website even gives a reasonable amount of explanation.