Ron,
Can you simulate this circuit in LTspice?
I need timing diagrams for Vi,Phi1,Phi2,Vo1,Vo2...Vo8?
Phi1 and Phi2 are signals at the output of non-overlapping clock generator in post 2.
Ron,
Can you simulate this circuit in LTspice?
I need timing diagrams for Vi,Phi1,Phi2,Vo1,Vo2...Vo8?
Phi1 and Phi2 are signals at the output of non-overlapping clock generator in post 2.