Is there a reason for the TO-92 package to be different
Relating to the thermal resistance, the TO-92 is not really "different", it's just that it is plastic. I'll bet a million bucks you will understand what I couldn't get the idiots at National semiconductor to understand:
The term Theta is thermal resistance form one point to another. Why have such a term? to calculate the total temp rise of the die.
Example: use a TO-3 transistor whose theta (J-C) is 2C/W. That means 2C/W from die to the metal flat surface on the bottom of the case.
Now bolt it to a heatsink: theta (C-S) is maybe 0.5C/W from the transitor to the heatsink.
Now the heatsink might be 5C/W theta (S-A) from the sink to the air.
Add them all together and you get 7.5C/W from die to air, which is Theta (J-A)
Theta J-A is all you care about, it's how you calculate die temp given power dissipation.
NOW: how about a little plastic T0-92? How do you attach it to a heatsink? What do you define as the "case" mounting surface when there is none? You can't attach it to a heatsink, you can't solder it down to a heatsink copper layer. Therfore, Theta(J-C) is undefined unless you want to designate a point on the plastic to glue it to..... and the heatsink does almost nothing because the heat flows so poorly through plastic that more heat gets out down the metal leads.
You see why I used to pull my hair out when marketing morons insisted on publishing theta(J-C) numbers on packages where it is undefined. You can only reliably measure theta (J-A) on those. But, as you see given the datasheet, marketing gets it's way when the lunatics are running the asylum. Common sense be damned.
what's with the wierd pin out for the negative versions, i.e. LM7905, LM337 etc?
That's mandatory because the center pin is always connected to substrate. The neg regs are wired differently inside and use NPN power transistors instead of PNP and it flips things around. I recall the substrate on pos regs is always ground, but on neg regs it is the output. The substrate is usually the center pin.