the software I'm using is Proteus ISIS. If ISIS discovers a time problem I receive an error message, such at the one using the counter output pins without pulldown resistors.
I also tried using PNP-transistors on the high side, but there was one group of (activated) LEDs bright and all others were dim. That's not what I had on mind.
The problem is controlling a much higher voltage with low voltage (21V controlled by max. 12V, ignoring losses).
The circuit works fine with groups of three LEDs, and I guess we should "sell" it to the OP this way. Wiring will be very easy using my idea of 10-pin connectors.
To get the approximate number of LEDs, not 10X10X5 but 10X17X3 had to be used resulting in 510LEDs (LED spacing 1.96cm instead of 2cm for 10m length ) and one more counter IC. That one resets itself when counting to 7. (outputs 0 through 6 are used for the LEDS).
I also tried using PNP-transistors on the high side, but there was one group of (activated) LEDs bright and all others were dim. That's not what I had on mind.
In that case, you need a pulldown resistor for each NPN transistor that drives the PNP. I should have anticipated this issue. If the outptu of the counter is ~1V when low, then the series/shunt reisitors have to divide that down below the transistor turn on voltage. Try using a 10K connected between the 56K and ground.
The output of the counter will be very close to 0V when low. It is CMOS after all, and when low it's not drawing any current [from the NPN].
Re simulation errors, I often get simulation errors when a 1N4148 diode is used (something about having to reduce saturation current to solve/converge); yet in real life, the same circuit will work well and without any simulator error. Also, if you decrease the simulation timestep you will get more-correct results (with autotimestep the results can be completely wrong); but don't trust them unconditionally, they're based on imperfect models.
Re simulation errors, I often get simulation errors when a 1N4148 diode is used (something about having to reduce saturation current to solve/converge); yet in real life, the same circuit will work well and without any simulator error. Also, if you decrease the simulation timestep you will get more-correct results (with autotimestep the results can be completely wrong); but don't trust them unconditionally, they're based on imperfect models.
that can't be it. I used manual clocking for the counters (see screenshots) and received the error message (and stop of simulation) despite that the moment the counter advanced to an output not being pulled down.
I guess using an extra resistor SIL-package for pull-ups or pull-downs won't make a circuit unaffordable, but it takes care of definite logic levels.
Operating a circuit with reverse polarity is simulated almost the same as a live circuit - with the exception of no smoke on the monitor display.
ISIS is also a bit touchy when handling CMOS ICs: Connecting more than two inputs to one output the output becomes indefinite.
Models are too perfect sometimes. Switches and buttons are bounceless and have zero Ω resistance.
I'm sure you knew that I meant that the model doesn't behave in the same manner as the real device - it's just an approximation.
As an example, try simulating the reverse breakdown voltage of an NPN signal transistor (e.g. BC548) - connect base and collector to gnd, a dc source to the emitter through a resistor. Now do a DC sweep and note the breakdown voltage... if there is one. It should be <10 volts bu the model probably doesn't take it into account.