If you want this circuit to work, you have to close the feedback loop from the emitter of Q2 back to the non inverting input of U2 (which is pin 2 I think). The phase shift across the discrete transistors should be minimal in the frequency range where a 324 op-amp has gain, so you should be able to enclose them in the loop with minimal effects on stability.
BTW: U2 serves as the error amplifier here which means it should not have resistive feedback alone, it needs a cap in series with the resistor so the DC gain will be very high but the AC gain will roll off at high frequencies. That series RC should go from the emitter of Q2 back to pin 2 of U2.
As for:
I'm not sure of the stability. Can you model it?
Dude, you have to build the circuit up to see if it works. Reminds me of this hot shot (and high priced) IC designer back at National Semiconductor who gave me a bunch of stability data related to the input capacitor and it's equivalent series resistance. To make a long story short, I found out the regulator IC oscillated like a banshee when the ESR of CIN was in a certain range. I took the data back to numnutz and asked him:
"I thought you said you took this data to make sure it was stable?"
His answer:
"I did.... I ran simulations."
And I am the one that got laid off?
Anyway, anybody who believes simulations and designs without bench data gets what they deserve... a circuit that's a time bomb. Just my opinion.