Long-tailed pair design help

[Elerion]

In my quest to design my own an audio power amplifier, I'm trying to fully understand how to design a proper BJT differential amplifier.

I faced two apparently easy questions I cannot answer by myself, even after some hours of thinking about it.

First is about long-tailed pair using resistive loads and 1 mA current source.



Using 8.6k collector resistors, the single ended output Vo1 is nice.



Trying to lower the minimum voltage, I increase the collector resistors to 18,6k.



But now the slope is not linear. There's a change around 0V (marked by a white thick line).
Why is it? Is there any way to solve this?

The other issue is about using active loads. Gain is much higher, as expected. But for 0V inputs, the output is almost on its highest value.



Is it well designed? Can I improve this?

Thank you very much!

 

[ronsimpson]

Please include you SPICE file so others can play with it to.

 

[Daniel Wood]

In terms of well designed, the current mirror is a definite improvement over the resistor tail. You will notice a considerable difference when you test for common mode rejection.

There are improvements you can make to the current mirror. A wilson current mirror will improve your CMRR.
Some other design guidelines you could take:

Replacing the collector resistors with pnp's, this will essentially replace the resistor v drop with VCE, which could push operation closer to the rails.

The input transistors can be darlington or sziklai pairs instead, this would improve the amplifiers input resistance. I think the differential gain would improve too but I can't remember.

As soon as add any load to the circuit, it will kill any sort of performance you have. Try and add a second/output stage to the amplifier. Essentially you want to isolate the differential side from any sort of loading. Even Base current from a second stage can hit the performance quite hard.

As for non-linearity, keep in mind that there is no feedback loop on the amplifier to limit the gain. Most amps are unstable with open loop gain.

If you're thinking of making a real circuit out of this, make sure the hfe (β) of the transistors in each mirror need to be matched as close as possible. Mismatched values will ruin performance. Temperature affects gain, so try and have the transistors as close together as possible.

 

[ronsimpson]

If you're thinking of making a real circuit out of this, make sure the hfe (β) of the transistors in each mirror need to be matched as close as possible. Mismatched values will ruin performance. Temperature affects gain, so try and have the transistors as close together as possible.

There is a difference between "text book" designs, SPICE designs, IC designs and real world designs.
Example. If Q1 and Q2 are not matched the current source will not work the way you want. If this was a IC where all the transistors were made of the same silicon, at the same time, at the same temperature, etc it will work just fine. In a audio amp you don't really know that Q1 and Q2 were made in the same year. They could be at different temperatures. Some one could have replaced one and used a National part or Mot part.
If you add some emitter resistance the current mirror relies more on the resistors and less on the transistors. I often put a volt across the emitter resistors.

 

[AnalogKid]

I agree with ron - current mirrors are great on paper - only. In the real world, rearrange Q1 and Q2 into a traditional current sink.

ak

 

[Elerion]

Please include you SPICE file so others can play with it to.

Sure. Here they are.

I agree with ron - current mirrors are great on paper

Yes, but now I'm trying to understand the behaviour of it alone, ideally, that is, on simulations. Then I'll face the real world . Step by step.

As for non-linearity, keep in mind that there is no feedback loop on the amplifier to limit the gain

Thats's true. But why is it nice and linear in the lower collector resistors version (8,6k vs 18,6k)?
- What makes that slope change around zero volts when using 18,6k resistors? Should the output voltage swing be always above zero?
- On the active load version, how does the long tailed pair work if, for a null differential input, the output is almost on its highest value? The voltage swing is VERY asymmetrical.

 

[Daniel Wood]

I'm trying to understand the behaviour of it alone, ideally, that is, on simulations. Then I'll face the real world

You can probably get away with discreet components if you're just experimenting. Just run a small batch of identical transistors through a component analyser and pick the closest matched components.
Its good to learn about this stuff, otherwise we would have suggested to buy an op amp for 20p

Thats's true. But why is it nice and linear in the lower collector resistors version (8,6k vs 18,6k)

I've not done these type of designs in years so take this with a pinch of salt...
When you have larger collector resistors, you will get a bigger voltage drop across them. This will limit the usable voltage that the transistor will operate in. Chances are with the bigger resistors, the transistor is spending more time in its non-linear region.
The output swing is almost always above 0V. Usually a PNP is attached to Vo2 as part of a second stage in an attempt to shift the operating voltage down.

I'll show you some improvements in spice later, but I have work for the next couple of hours

 

[AnalogKid]

With Q4's base clamped at 0 V, V02 cannot go more negative than about -0.5 V, when Q4 saturates. This effectively clamps the emitter voltage of both Q4 and Q3, defeating the action of the current source under some conditions.

ak

 

[Elerion]

With Q4's base clamped at 0 V, V02 cannot go more negative than about -0.5 V, when Q4 saturates.

In the simulation, Vi2 is swept from -7V to +7V for the resistive loads, and -10 to +10V for the active load.
The non linearities in the resistive load version, occur when both inputs are well below 0V.