janetsmith2000@yahoo.com
New Member
Hi,
I have some questions regarding the clock input of PIC.
Fig 1 (Config A) is the most common way providing clock signal to PIC. Two pins of XTAL are connected to OSC1 and OSC2. OSC1 is CLK_IN, where OSC2 is CLK_OUT. Why do both CLK_IN and CLK_OUT are connected to XTAL?
Could we just connect CLK_IN to XTAL, and leave CLK_OUT disconnected?
If I want 2 PICs share a same master oscillator, is the Fig 2 Configuration B the correct way to do that? The 2nd PIC will get the same clock freq as the 1st PIC have.
I have come across a Clock generator (fig 3) which provides clock signal to other uC. I don't understand how it works. Besides XTAL and capacitor, there is Inverter (7404) and resistors. Can anyone explain to me?
Thanks.
I have some questions regarding the clock input of PIC.
Fig 1 (Config A) is the most common way providing clock signal to PIC. Two pins of XTAL are connected to OSC1 and OSC2. OSC1 is CLK_IN, where OSC2 is CLK_OUT. Why do both CLK_IN and CLK_OUT are connected to XTAL?
Could we just connect CLK_IN to XTAL, and leave CLK_OUT disconnected?
If I want 2 PICs share a same master oscillator, is the Fig 2 Configuration B the correct way to do that? The 2nd PIC will get the same clock freq as the 1st PIC have.
I have come across a Clock generator (fig 3) which provides clock signal to other uC. I don't understand how it works. Besides XTAL and capacitor, there is Inverter (7404) and resistors. Can anyone explain to me?
Thanks.