Failures appear random.
I can't achieve twisted pair outputs as resistance loss is a big consideration at 800A. I use parallel cabling to mitigate both resistance and inductance.
To date I allowed the avalanche of the transistors to limit the back emf, but I've been advised that the actual avalanche voltage varies significantly on date code. So it could be avalanche on the lowest breakdown transistor clamping the voltage and causing unbalanced avalanche and eventual early failure.
I just applied 4 x 1.5KE36CA bidirectional Tranzorbs to flywheel, max Vc = 50V. At full bore they run up to over 100 C, but that was with long leads and no specific airflow cooling design. The heating of the tranzorbs imply around 1 W dissipation on each.
I am remaking the PCB with the flywheels installed staggered for cooling and soldered to copper braid thickened traces for low resistance (electrical & thermal).
Curiously, placing a self healing X2 capacitor (.22uF) across a tranzorb caused it to jump in temperature by 50%, lower capacitances result in lower temp rise. Post back emf ringing drops in frequency significantly and elongates to over 15uS vs 10uS with no capacitor.
That definitely sounds like the most likely mismatch-related mode of failure to me - very interesting. It feels like you're on the right track with investigating snubbers and keeping the FETs out of avalanche. I'm sure you've thought of this, but you could also look at an asymmetrical snubber with all/part of the resistance bypassed with a diode - this might help reduce the dissipated power.I've been advised that the actual avalanche voltage varies significantly on date code. So it could be avalanche on the lowest breakdown transistor clamping the voltage and causing unbalanced avalanche and eventual early failure.
I have no idea what an ISOTOP FET is.
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