col_implant
New Member
Hi,
I'm generating a clock signal with my ADuC842 microcontroller. I am using timer0 overflow and interrupts to toggle an output bit.
I am getting a jitter in my signal of 180ns (or 3 core cycles). In my simulations it appears that the timer overflows always at the same moment. Is there a randomness in the interrupt in terms of core clock? anything i can do to generate a solid clock signal???
Cheers
C
I'm generating a clock signal with my ADuC842 microcontroller. I am using timer0 overflow and interrupts to toggle an output bit.
I am getting a jitter in my signal of 180ns (or 3 core cycles). In my simulations it appears that the timer overflows always at the same moment. Is there a randomness in the interrupt in terms of core clock? anything i can do to generate a solid clock signal???
Cheers
C