In any case since you appear to need only one location you might as well pull all four address inputs up through a single 1K resistor. So you will be using address 15 in the RAM. Connect the data outputs of the JK flip-flops to the data inputs D1, D2, and D3, and ground input D4. Can't I just wire A0, A1, A2 and A3 straight to +5 volts instead of using the pull up resistors?
The truth table for ME* and WE* tells us that both must go low to write a value. So I'll ground ME* and use the three input nand gate coming off of my three jk flip flop outputs to put a low to WE* when my counter reaches 0111?
To decode the counter, use a three input NAND gate to generate a low when the counter is equal to 7. Can I not use this same low when the counter is equal to 7 to send a low to my WE*? The OR Gate is for what? I'm getting stumped here, what do you mean combine the clock with the low from the nand gate, where do I need the high from the OR? Now combine the output with the clock using a two input OR gate. The negative logic function is a low and a low is a low. This will be WE*. I'm guessing that you can use the output of the three input NAND gate to stop the counter.
What will reset the counter? Just curious. Again, I really appreciate all of your expertise, it's great to be able to ask some of these questions outside of the lab and to be able to learn outside the class room![color=blue][/color]