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MPLAB SIM not 'watching" properly

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Mosaic

Well-Known Member
Hi all:

I am going thru the lessons on the 16f690 PICkit 2 starter, with some weird probs. The code below blinks the LED off Port C, bit zero.

The code below works.

I can't get MPLABsim to 'watch' the variables Delay1 and Delay2 or the PORTC SFR. They stay fixed at zero even as i see the code going thru the decrement loop. Yet the code WORKS on the PIC with a happy blinking LED.

I CAN watch the SFR PC change as it steps thru the code though. So I am stumped!!!

Upon inspecting the file register view window, I have discovered that the actual working addresses of the delay1 and delay2 variables are 0A0 and 0A1, which is DIFFERENT from the addresses (020 & 021) of the same variables as selected in the WATCH window. What's even more curious is that addresses 020 & 021 are Labeled as Delay1 and Delay2 in the view registers (symbolic option) window, yet they do not change during the sim. So it seems that somehow mplabsim HAS named 020 & 021 as the Delay1/Delay2 variable locations its actually USING 0A0 & 0A1 to keep the data. Thus the watch window is showing the wrong hardware locations. Address 0A0 & 0A1 have no symbolic label in the View registers display, but i can watch them count down during the sim.

By Manually adding addresses 0A0 and 0A1 to the watch window I can see them update properly, yet the Symbolic Addresses Delay1, Delay2 are dislocated. Now 0A0 is exactly 128 (decimal) more than 020, some kinda bank switching deal going on here.
______________________________________________________________________


list p=16f690 ; list directive to define processor
#include <P16F690.inc> ; processor specific variable definitions

__CONFIG _CP_OFF & _CPD_OFF & _BOR_OFF & _PWRTE_ON & _WDT_OFF & _INTRC_OSC_NOCLKOUT & _MCLRE_ON & _FCMEN_OFF & _IESO_OFF

UDATA
Delay1 RES 1
Delay2 RES 1


main

; remaining code goes here

Start
BSF STATUS,RP0 ;SELECT REGISTER PAGE 1, BY SETTING THE BIT HI
BCF TRISC,0 ; MAKE I/O PIN C0 AN OUTPUT, BY SETTING PIN 0 LOW.
; BCF STATUS,RP0 ; RESET REGISTER TO PAGE 0, don't use if u want to read port c.
BSF PORTC,0 ; SET PIN C0 HIGH. TURNING ON LED.


Longloop
CLRF Delay1
CLRF Delay2
LOOP
DECFSZ Delay1,F ; 1 inst cycle, when delay1=0 => tesdt = true skip next line.
;NOP
GOTO LOOP ; 2 inst cycles, this is looped 256 times before skipping to next line => 768 microsec at 1 MIP
DECFSZ Delay2,F ; 1 inst cycle
GOTO LOOP ; 2 inst cyles, by adding the loops = 256 * 768 + (256*3) = 257* 768 = 197376 microsec = .2 sec.

MOVF PORTC,0 ;MOVE PORTC INTO W REG.
XORLW B'00000001' ; XOR BIT 0 WITH A '1'
MOVWF PORTC ;OUTPUT TO C.
GOTO Longloop ; CONTINUE

end;
 
Last edited:
Ok, I figured it out.
The bankswitching to access PORTC must be managed so that no variables are accessed before resetting to Bank 0. Otherwise the variables show up in the wrong bank of RAM.
See below for the code that allows proper variable watching, including a MirrorC variable to track PORTC as the SIM cannot read PORTC.

ALSO declare your Watch variables like this:

VARIABLES UDATA_SHR
Delay1 RES 1
Delay2 RES 1
MirrorC RES 1


Start
BSF STATUS,RP0 ;SELECT REGISTER PAGE 1, BY SETTING THE BIT HI
BCF TRISC,0 ; MAKE I/O PIN C0 AN OUTPUT, BY SETTING PIN 0 LOW.
BCF STATUS,RP0 ; RESET REGISTER TO PAGE 0 otherwise variables end up in Bank1 and screw the watch table.
BSF PORTC,0 ; SET PIN C0 HIGH. TURNING ON LED.
BSF MirrorC,0


Longloop
CLRF Delay1
CLRF Delay2
LOOP

DECFSZ Delay1,F ; 1 inst cycle, when Delay1=0 => test => if true then skip next line.

GOTO LOOP ; 2 inst cycles, this is looped 256 times before skipping to next line => 768 microsec at 1 MIP
DECFSZ Delay2,F ; 1 inst cycle
GOTO LOOP ; 2 inst cyles, by adding the loops = 256 * 768 + (256*3) = 257* 768 = 197376 microsec = .2 sec.
BSF STATUS,RP0 ;SELECT REGISTER PAGE 1, BY SETTING THE BIT HI
MOVF PORTC,0 ;MOVE PORTC INTO W REG.
XORLW B'00000001' ; XOR BIT 0 WITH A '1'
MOVWF PORTC ;OUTPUT TO C.
MOVWF MirrorC
BCF STATUS,RP0 ; RESET REGISTER TO PAGE 0.
GOTO Longloop ; CONTINUE
 
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