Joel,
I was able to use the \code file as you suggested and have loaded a programme that I wrote on the previous version of MPLAB.
However, I'm seeing the following error message and cannot find the problem.
Make: The target "D:\Projects32\PIC_A.o" is out of date.
Executing: "D:\Program Files\Microchip\MPASM Suite\MPAsmWin.exe" /q /p16F84A "PIC_A.asm" /l"PIC_A.lst" /e"PIC_A.err" /o"PIC_A.o" /w2
Make: The target "D:\Projects32\PIC_A.cof" is out of date.
Executing: "D:\Program Files\Microchip\MPASM Suite\MPLink.exe" "D:\Program Files\Microchip\MPASM Suite\LKR\16f84a.lkr" "D:\Projects32\PIC_A.o" /o"PIC_A.cof" /M"PIC_A.map"
MPLINK 3.94, Linker
Copyright (c) 2005 Microchip Technology Inc.
Error - section '.org_0' can not fit the absolute section. Section '.org_0' start=0x00000000, length=0x00000244
Errors : 1
BUILD FAILED: Tue Oct 11 09:11:40 2005
Here it the first few lines of the prog.
porta equ 05 ;
portb equ 06 ;
trisa equ 85 ;PORTA DIRECTIONAL REGISTER = 85
trisb equ 86 ;PORTB DIRECTIONAL REGISTER = 86
cblock 0x20
boolean
count0 ;used as a general counter
count1 ;used in division routine
count2 ;used in division routine
counta ;used in delay routine
countb ;used in delay routine
const0 ;constant - used in division routine
const1 ;constant - used in division routine
const2 ;constant - used in division routine
index ;holds switch data
offset ;holds index - 8 value
swval ;switch value, taken from portb
endc
#define arm porta, 0 ;hardware control
#define preset porta, 1 ;preset hardware
#define en_clk porta, 2 ;enable clock hardware
#define o_1 porta, 3 ;O1 signal
#define Q_8 porta, 4 ;counter IC8/Q4
#define start0 boolean, 0 ;start0/512 indicator
#define _50k boolean, 1 ;sample rate = 50 kHz
#define jmp2spd boolean, 2 ;jump to spd (start point decision)
#define sl_bit boolean, 3 ;slope switch indicator, taken from RA3
#define o_1s boolean, 4 ;remembers that O1 has been set
#define sw_ch boolean, 6 ;port change indicator
#define data boolean, 7 ;temp
#define mode swval, 7 ;Setup/Run indicator
#define slopesw porta, 3 ;to be RD7 slope switch
ORG 0x000 ; processor reset vector
main (this came from the template)
start call Init
sw_chg call reset ;
btfsc swval, 7 ;check mode
goto setup ;
I could build this prog in the previous MPLAB.