Need Help Deciphering Layout Specs

P

phillipsoasis

New Member
I am making a board (111mm x 146mm, 4 layer) with a PZT3904 transistor. It has a heat sink pin and I am uncertain as to how much copper I have to put around that pin so it has adequate heat dissipation. The datasheet says I need the following for a maximum of 1 watt heat dissipation:

Quote
PCB size: FR-4, 76 mm x 114 mm x 1.57 mm (3.0 inch x 4.5 inch x 0.062 inch) with minimum land pattern size.
Click to expand...

I know FR-4 is just the material for the board. Are the dimensions the min size board it needs, or the space this one part needs? What size pad do I need under the heat sink pin? I believe the heat sink pin is connected to the collector, but I don't see that in the spec sheet. Or, do I leave it unconnected?

 
Sort by date Sort by votes
The heat sink is connected to the collector, as there is a "C" in the image on the datasheet next to the heatsink as well as the one between "B" and "E". The two parts labelled "C" are ends of the same bit of metal.

1 W is the maximum, and that needs a huge bit of board. The transistor will then have a temperature rise of 125 deg C per Watt, so 125 deg C above ambient, so about 150 deg C if there is nothing else heating it.

I wouldn't run a transistor like that much above 0.2 W. If you need more power, look for a larger power rating transistor.
 
Upvote 0 Downvote
I am only running ~250 mA through the transistor, which is about 75 mW of dissipation if I am reading the graphs correctly (~0.3V Vce). How big of a copper area would I need for that? How would I calculate it?

It is just a general purpose PNP transistor. Nothing special, I have some TO-92 versions in my junk box and and used it in my prototype with a small heat sink. I wanted to replace it with an SMD version for a board version of my prototype.
 
Upvote 0 Downvote
A lot of data sheets have something similar to that, in the thermal characteristics part.
It states "Minimum land pattern" - so only the device pads, but overall a bigger board to spread and dissipate heat.

This is how I arrange the pads on similar packages, for power dissipation - an area around the centre tab & underneath the device "stitched" with vias to copper areas in other layers, to take the heat away from the device.

(Just saw your update - 75mW is fairly trivial, I'd not expect any large areas to be needed at that.)

 
Upvote 0 Downvote
75 mW isn't much, just 7.5% of 1 W. If you have 7.5% of the area, that will be more than enough. That is 25 x 26 mm,

My guess is that would be much more than you need, but you can't have too much and it will just run cooler.
 
Upvote 0 Downvote
You must log in or register to reply here.

Similar threads

F
  • Question
Need ro re-download Altium Designer PCB layout
Replies
0
Views
2K
Flyback
F
O
  • Question
PCB design verification
Replies
12
Views
10K
For The Popcorn
F
F
  • Question
PCB Hero: Essential PCB Silkscreen Guidelines for Layout
Replies
1
Views
2K
For The Popcorn
F
S
Via-in-Pad in PCB Design
Replies
9
Views
2K
rjenkinsgb
W
  • Question
pcb copper board - copper thickness
Replies
3
Views
8K
rjenkinsgb
Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…