Negative/Lagging Edge Detector Circuit

[variaseng]

Hi, does anyone have a working lagging edge detector circuit? Or does anyone know an IC that could do this? I found this circuit in the net but I'm not sure what IC to use such that it can process 500Hz to 10kHz PWM signal. View attachment 60602

 

[ericgibbs]

Hi, does anyone have a working lagging edge detector circuit? Or does anyone know an IC that could do this? I found this circuit in the net but I'm not sure what IC to use such that it can process 500Hz to 10kHz PWM signal. View attachment 60602

hi,
Its a Quad NAND Schmitt IC, which working voltages you use will determine the device type. eg: 74LS132 for TTL or HEF4093 for CMOS .

EDIT:
You could use a spare NAND gate in the IC to replace the Inverter

 

[variaseng]

[SOLVED] Negative/Lagging Edge Detector Circuit

Hi, thank you very much for this! Turns out I needed a positive lagging edge detector circuit. I just changed the last NAND gate into an AND gate. View attachment 60616View attachment 60617 Again, thank you very much!

 

[ericgibbs]

Hi, thank you very much for this! Turns out I needed a positive lagging edge detector circuit. I just changed the last NAND gate into an AND gate. View attachment 60616View attachment 60617 Again, thank you very much!

hi,
If you need a wider output pulse, increase the 1n0 to say 2.2n or 4.7n... Dont make the output pulse period greater than the 50uSec of the 10KHz

EDIT:
I see you have used a regular AND gate not a Schmitt, this may cause multiple edges on the output pulse, just check it out.

 

[variaseng]

Oh, I see. Is there any other way I can get a positive lagging edge detector circuit if not replacing the NAND gate with and AND? Again, thank you very much!

 

[ericgibbs]

Oh, I see. Is there any other way I can get a positive lagging edge detector circuit if not replacing the NAND gate with and AND? Again, thank you very much!

You could just invert the input pulse to project by using another inverter on the input signal.