Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Nigel's I2C EEPROM code again

Status
Not open for further replies.

kcn

New Member
Sorry for this double post.

Hi Nigel, I'm still confused. I read your tutorial and peeked at the
data sheet and I just don't understand. Sorry for my ignorance.

For my 512K bit EEPROM, it has 512 * 1024 / 256 = 2048 pages.
Correct?

If there are 2048 pages, then this is too large of a value to fit into
Data_Page!

My question was: what are the range of values for Adr_Hi and
Data_Page for a 512K bit EEPROM?

19 bits are required to address 512K bits, and I can't understand
from your tutorial exactly what is being mapped to what. Are the
lower eight bits mapped to Adr_Low? Are the next eight bits
mapped to Adr_Hi? What does Data_Page do exactly?

If you could please tell me the exact ranges of Adr_Hi and Data_Page
and how the bits are assigned, then I will understand better.

For a 512K serial EEPROM, is the Data_Page just always 0x00 and
not used at all?

Thank you!

kcn
 
kcn said:
Sorry for this double post.

Hi Nigel, I'm still confused. I read your tutorial and peeked at the
data sheet and I just don't understand. Sorry for my ignorance.

For my 512K bit EEPROM, it has 512 * 1024 / 256 = 2048 pages.
Correct?

If there are 2048 pages, then this is too large of a value to fit into
Data_Page!

My question was: what are the range of values for Adr_Hi and
Data_Page for a 512K bit EEPROM?

19 bits are required to address 512K bits, and I can't understand
from your tutorial exactly what is being mapped to what. Are the
lower eight bits mapped to Adr_Low? Are the next eight bits
mapped to Adr_Hi? What does Data_Page do exactly?

If you could please tell me the exact ranges of Adr_Hi and Data_Page
and how the bits are assigned, then I will understand better.

For a 512K serial EEPROM, is the Data_Page just always 0x00 and
not used at all?

The Data_Page value has two uses on the smaller chips, as well as selecting which page you're accessing it also addresses which chip you're addressing as well. Each chip has a number of address lines which you can connect high or low, and make each chip individually addressable (by writing the correct value to Data_Page). This limits the maximum address size, to one maximum size chip (24L16), two half size chips (24L08) etc.

In extended addressing the Data_Page only has one use, it sets the device address - and as the 24C512 only uses two bits, this means a maximum of four devices can be connected.

So you set Data_Page to the device address of your 24C512, which is set by connecting the address pins (pins 1 and 2). Then Adr_Hi and Adr_Lo act as a 16 bit address into the 64KByte space of the chip - the extra address register was added to allow larger chips than the old scheme allowed.
 
Oh, okay. Adr_Hi and Adr_Lo together constitute the 16 bits needed
to address the 64K bytes on the 512K bit EEPROM, and Data_Page is
used to select the EEPROM.

I believe that the 512K bit EEPROM is divided into 256 byte pages,
and I kept thinking that Data_Page had something to do with that.
If Data_Page had been called something like Adr_Sel (for address
selection), then I wouldn't have been so confused!

Nigel, if your code was properly modified, could eight 512K bit
EEPROMs share the same bus to form a 512K byte memory bank?

Thank you so much for your help!

kcn
 
kcn said:
Oh, okay. Adr_Hi and Adr_Lo together constitute the 16 bits needed
to address the 64K bytes on the 512K bit EEPROM, and Data_Page is
used to select the EEPROM.

I believe that the 512K bit EEPROM is divided into 256 byte pages,
and I kept thinking that Data_Page had something to do with that.
If Data_Page had been called something like Adr_Sel (for address
selection), then I wouldn't have been so confused!

Nigel, if your code was properly modified, could eight 512K bit
EEPROMs share the same bus to form a 512K byte memory bank?

Not on the same bus, as I mentioned above the 24C512 only has two address select lines, so you can only have four on the same bus. But you could modify the code to have two blocks of four with a common data line and two seperate clock lines.
 
Hi Nigel, I am using the 24LC512 from Microchip. The data sheet at:

https://www.electro-tech-online.com/custompdfs/2005/03/21754F.pdf

shows three address lines and it even says that eight of them
can be cascaded together. Are you sure that only four can
be put together?

I have definitely had issues with sample code in Microchip data
sheets simply not working, so I will definitely defer to you if you say
that only four can be put together.

kcn
 
kcn said:
Hi Nigel, I am using the 24LC512 from Microchip. The data sheet at:

https://www.electro-tech-online.com/custompdfs/2005/03/21754F-1.pdf

shows three address lines and it even says that eight of them
can be cascaded together. Are you sure that only four can
be put together?

I have definitely had issues with sample code in Microchip data
sheets simply not working, so I will definitely defer to you if you say
that only four can be put together.

The datasheet I was looking at was from Atmel, that only has two address lines. If the MicroChip version has three address lines, you should be able to address 8 chips.
 
Status
Not open for further replies.

Latest threads

New Articles From Microcontroller Tips

Back
Top